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Re: [Qemu-devel] [FYI 5/5] target-arm: Add support for Cortex-R4F


From: Peter Maydell
Subject: Re: [Qemu-devel] [FYI 5/5] target-arm: Add support for Cortex-R4F
Date: Thu, 10 Nov 2011 16:12:14 +0000

On 10 November 2011 10:32, Andreas Färber <address@hidden> wrote:
> +        {
> +            static const struct {
> +                uint8_t r;
> +                uint8_t p;
> +                uint8_t value;
> +            } fpsid_revs[] = {
> +                { 1, 0, 0x3 },
> +                { 1, 1, 0x4 },
> +                { 1, 2, 0x6 },
> +                { 1, 3, 0x7 },
> +                { 1, 4, 0x8 },
> +                {}
> +            };
> +            uint8_t r = (ARM_CPUID(env) >> 20) & 0xf;
> +            uint8_t p = ARM_CPUID(env) & 0xf;
> +            uint8_t rev = 0;
> +            int i;
> +            set_feature(env, ARM_FEATURE_VFP);
> +            set_feature(env, ARM_FEATURE_VFP3);
> +            /* TODO VFPv3-D16 */
> +            /* Calculate FPSID value matching to MIDR */
> +            for (i = 0; fpsid_revs[i].r != 0; i++) {
> +                if (fpsid_revs[i].r == r && fpsid_revs[i].p == p) {
> +                    rev = fpsid_revs[i].value;
> +                    break;
> +                }
> +            }
> +            if (rev == 0) {
> +                cpu_abort(env,
> +                          "Cortex-R4F r%" PRIu8 "p%" PRIu8 " unsupported",
> +                          r, p);
> +            }
> +            env->vfp.xregs[ARM_VFP_FPSID] = 0x41023140 | (rev & 0xf);
> +        }

This seems a bit "beyond the call of duty" since we don't try to do
it for any other CPUs. I would just set the FPSID to a fixed value...

-- PMM

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