[Qemu-devel] [PATCH] hw/pxa2xx.c: Fix handling of RW bits in PMCR

[Peter Maydell]

Fix an error in commit afd4a6522 which meant that writing a zero
to the RW bits in the PMCR wouldn't actually clear them. (Error
spotted by Andrzej Zaborowski.)

Signed-off-by: Peter Maydell <address@hidden>
---
This fixes the bug Andrzej pointed out in comments on the earlier
patch; sorry about this error. I opted to use a separate & rather
than merging the bit-clearing in with the W1C handling for clarity.

 hw/pxa2xx.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index d38b922..e9a507e 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -117,6 +117,7 @@ static void pxa2xx_pm_write(void *opaque, 
target_phys_addr_t addr,
         /* Clear the write-one-to-clear bits... */
         s->pm_regs[addr >> 2] &= ~(value & 0x2a);
         /* ...and set the plain r/w bits */
+        s->pm_regs[addr >> 2] &= ~0x15;
         s->pm_regs[addr >> 2] |= value & 0x15;
         break;
 
-- 
1.7.4.1