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Re: [Qemu-devel] [Bug 902148] Re: qemu-img V1.0 hangs on creating Image
From: |
Stefan Hajnoczi |
Subject: |
Re: [Qemu-devel] [Bug 902148] Re: qemu-img V1.0 hangs on creating Image (0.15.1 runs) |
Date: |
Tue, 20 Dec 2011 08:04:31 +0000 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Mon, Dec 19, 2011 at 05:26:22PM -0000, Michael Niehren wrote:
> i got the following output with your patch:
>
> Formatting 'test.img', fmt=qcow2 size=1073741824 encryption=off
> cluster_size=65536
> bdrv_rw_co_entry is_write 0 sector_num 0 nb_sectors 1 =waiting for rwco.ret
> != NOT_DONE
> waiting for rwco.ret != NOT_DONE
> 0
> bdrv_rw_co_entry is_write 1 sector_num 0 nb_sectors 1 =waiting for rwco.ret
> != NOT_DONE
> 0
> bdrv_rw_co_entry is_write 1 sector_num 128 nb_sectors 128 =waiting for
> rwco.ret != NOT_DONE
> 0
> bdrv_rw_co_entry is_write 1 sector_num 128 nb_sectors 128 =-5
> waiting for rwco.ret != NOT_DONE
> waiting for rwco.ret != NOT_DONE
> waiting for rwco.ret != NOT_DONE
> ....
>
> and runs forever
The '=-5' is an Input/Output Error (EIO). For some reason bdrv_rw_co()
is still waiting for the request to finish after the error has been
returned.
Is it possible for you to make the qemu-img binary available so I could
try to reproduce this and debug it?
Stefan
- [Qemu-devel] [PATCH v2 0/9] various ARM fixes, Mark Langsdorf, 2011/12/22
- [Qemu-devel] [PATCH v2 4/9] arm: add dummy gic security registers, Mark Langsdorf, 2011/12/22
- [Qemu-devel] [PATCH v2 2/9] arm: Set frequencies for arm_timer, Mark Langsdorf, 2011/12/22
- [Qemu-devel] [PATCH 5/9] ahci: convert ahci_reset to use AHCIState, Mark Langsdorf, 2011/12/22
- [Qemu-devel] [PATCH v2 1/9] arm: add missing scu registers, Mark Langsdorf, 2011/12/22
- [Qemu-devel] [PATCH 9/9] arm: increase a9mp interrupts to 160, Mark Langsdorf, 2011/12/22
- [Qemu-devel] [PATCH v2 3/9] arm: add dummy v7 cp15 config_base_register, Mark Langsdorf, 2011/12/22
- [Qemu-devel] [PATCH v2 8/9] Add xgmac ethernet model, Mark Langsdorf, 2011/12/22
- [Qemu-devel] [PATCH 6/9] ahci: add support for non-PCI based controllers, Mark Langsdorf, 2011/12/22
- [Qemu-devel] [PATCH v2 7/9] add L2x0/PL310 cache controller device, Mark Langsdorf, 2011/12/22