qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-devel] [PATCH v4 3/4] target-mips: Fix FPU reset


From: khansa
Subject: [Qemu-devel] [PATCH v4 3/4] target-mips: Fix FPU reset
Date: Tue, 3 Jan 2012 09:54:17 +0500

From: Khansa Butt <address@hidden>

in translate_init.c fpu_init() initializes active_fpu for given cpu
model afterwards cpu_reset() resets all the members upto breakpoints
due to this whatever the value of  cpu_model->CR1_fcr0 was , the value of
env->active_fpu.fcr0 is zero now. This patch resolve this issue so that
FP operations can be emulated. cpu_reset() can't call fpu_init() as it require
to pass mips_def_t *def to cpu_reset() which will break the convention

Signed-off-by: Khansa Butt <address@hidden>
---
 target-mips/translate.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/target-mips/translate.c b/target-mips/translate.c
index cecdacc..4b97905 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -12731,6 +12731,7 @@ void cpu_reset (CPUMIPSState *env)
     tlb_flush(env, 1);
 
     /* Reset registers to their default values */
+    env->active_fpu.fcr0 = env->cpu_model->CP1_fcr0;
     env->CP0_PRid = env->cpu_model->CP0_PRid;
     env->CP0_Config0 = env->cpu_model->CP0_Config0;
 #ifdef TARGET_WORDS_BIGENDIAN
-- 
1.7.3.4




reply via email to

[Prev in Thread] Current Thread [Next in Thread]