[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 2/4] arm: Remove incorrect comment in arm_timer
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 2/4] arm: Remove incorrect comment in arm_timer |
Date: |
Wed, 18 Jan 2012 12:13:05 +0000 |
From: Mark Langsdorf <address@hidden>
The current comment says that the arm_timers are restricted to between
32 KHz and 1 MHz, but sp804 TRM does not specify those limits.
Signed-off-by: Mark Langsdorf <address@hidden>
Reviewed-by: Andreas Färber <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm_timer.c | 3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/hw/arm_timer.c b/hw/arm_timer.c
index 1902f1a..ead2535 100644
--- a/hw/arm_timer.c
+++ b/hw/arm_timer.c
@@ -273,11 +273,8 @@ static int sp804_init(SysBusDevice *dev)
qi = qemu_allocate_irqs(sp804_set_irq, s, 2);
sysbus_init_irq(dev, &s->irq);
- /* The timers are configurable between 32kHz and 1MHz
- * defaulting to 1MHz but overrideable as individual properties */
s->timer[0] = arm_timer_init(s->freq0);
s->timer[1] = arm_timer_init(s->freq1);
-
s->timer[0]->irq = qi[0];
s->timer[1]->irq = qi[1];
memory_region_init_io(&s->iomem, &sp804_ops, s, "sp804", 0x1000);
--
1.7.1
- [Qemu-devel] [PULL 0/4] arm-devs queue, Peter Maydell, 2012/01/18
- [Qemu-devel] [PATCH 2/4] arm: Remove incorrect comment in arm_timer,
Peter Maydell <=
- [Qemu-devel] [PATCH 1/4] vexpress, realview: Add (dummy) L2 cache controller, Peter Maydell, 2012/01/18
- [Qemu-devel] [PATCH 4/4] arm: make the number of GIC interrupts configurable, Peter Maydell, 2012/01/18
- [Qemu-devel] [PATCH 3/4] hw/lan9118: Add save/load support, Peter Maydell, 2012/01/18
- Re: [Qemu-devel] [PULL 0/4] arm-devs queue, Anthony Liguori, 2012/01/19