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Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank
From: |
Mark Langsdorf |
Subject: |
Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank |
Date: |
Wed, 18 Jan 2012 13:06:42 -0600 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:8.0) Gecko/20111124 Thunderbird/8.0 |
On 01/18/2012 08:53 AM, Peter Maydell wrote:
> On 18 January 2012 14:35, Mark Langsdorf <address@hidden> wrote:
>> I can set the smp_loader code so that I can boot 2 cpus
>> and verify their existence in /proc/cpuinfo, but I can't
>> get 3 cpus to boot at all, no matter how I hack the existing
>> arm_boot code.
>
> Right, multiple secondary cores requires multiple addresses
> to be polled which we don't support in arm_boot.c at the moment.
How would multiple polling supposed to work? I've tried changing
http://lxr.linux.no/#linux+v3.2.1/arch/arm/mach-highbank/highbank.c#L71
to point to a fixed address (0x50), and the boot loader still fails
if there are 2 or more secondary CPUs.
I've figured out that do_cpu_reset() is only called once, even
though that seems a bit strange to me. I've tried the following
in my local secondary_hook call:
switch (info->nb_cpus) {
case 4:
stl_phys_notdirty(0x70, 0);
case 3:
stl_phys_notdirty(0x60, 0);
case 2:
stl_phys_notdirty(0x50, 0);
env->regs[15] = 0x100;
break;
}
which works fine with 2 cpus, but fails to boot both
secondary cpus if there are 3 total cpus.
--Mark Langsdorf
Calxeda, Inc.
- [Qemu-devel] [PATCH v10 0/5] arm: add support for Calxeda Highbank, (continued)
- [Qemu-devel] [PATCH v10 0/5] arm: add support for Calxeda Highbank, Mark Langsdorf, 2012/01/17
- [Qemu-devel] [PATCH v10 1/5] Add xgmac ethernet model, Mark Langsdorf, 2012/01/17
- [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/17
- Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/17
- Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/18
- Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/18
- Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/18
- Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/18
- [Qemu-devel] [PATCH][RFC] arm: add secondary cpu book callbacks to arm_boot.c, Mark Langsdorf, 2012/01/18
- Re: [Qemu-devel] [PATCH][RFC] arm: add secondary cpu book callbacks to arm_boot.c, Peter Maydell, 2012/01/18
- Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank,
Mark Langsdorf <=
- Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/18
- Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/18
- Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/18
- [Qemu-devel] [PATCH v10 3/5] ahci: add support for non-PCI based controllers, Mark Langsdorf, 2012/01/17
- [Qemu-devel] [PATCH v10 2/5] arm: make the number of GIC interrupts configurable, Mark Langsdorf, 2012/01/17
- [Qemu-devel] [PATCH v10 5/5] arm: Remove incorrect comment in arm_timer, Mark Langsdorf, 2012/01/17
[Qemu-devel] [PATCH v11 0/5] arm: add support for Calxeda Highbank, Mark Langsdorf, 2012/01/19