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Re: [Qemu-devel] [PATCH RFC v3 08/21] target-arm: Move CPU feature flags
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH RFC v3 08/21] target-arm: Move CPU feature flags out of CPUState |
Date: |
Tue, 7 Feb 2012 17:28:50 +0000 |
On 3 February 2012 02:59, Andreas Färber <address@hidden> wrote:
> +static void sa11xx_class_init(ARMCPUClass *k, const ARMCPUInfo *info)
> +{
> + set_class_feature(k, ARM_FEATURE_STRONGARM);
> +}
> static const ARMCPUInfo arm_cpus[] = {
> {
> .name = "arm926",
> .id = 0x41069265,
> + .features = ARM_FEATURE(V5) |
> + ARM_FEATURE(VFP),
> },
> {
> .name = "sa1100",
> .id = 0x4401A11B,
> + .class_init = sa11xx_class_init,
> },
So why are we handling some of these feature bits by setting them
in .features, and some of them via a .class_init which sets the
feature bit?
-- PMM
- [Qemu-devel] [PATCH RFC v3 14/21] target-arm: Move the PXA270's iwMMXt reset to pxa270_reset(), (continued)
- [Qemu-devel] [PATCH RFC v3 16/21] target-arm: Store VFP MVFR0 and MVFR1 in ARMCPUClass, Andreas Färber, 2012/02/02
- [Qemu-devel] [FYI v3 21/21] target-arm: Just for testing!, Andreas Färber, 2012/02/02
- [Qemu-devel] [PATCH RFC v3 10/21] target-arm: Store cp15 c0_c1 and c0_c2 in ARMCPUClass, Andreas Färber, 2012/02/02
- [Qemu-devel] [PATCH RFC v3 15/21] target-arm: Store VFP FPSID register in ARMCPUClass, Andreas Färber, 2012/02/02
- [Qemu-devel] [PATCH RFC v3 08/21] target-arm: Move CPU feature flags out of CPUState, Andreas Färber, 2012/02/02
- Re: [Qemu-devel] [PATCH RFC v3 08/21] target-arm: Move CPU feature flags out of CPUState,
Peter Maydell <=
- [Qemu-devel] [PATCH RFC v3 18/21] target-arm: Store CCSIDRs in ARMCPUClass, Andreas Färber, 2012/02/02
- [Qemu-devel] [PATCH RFC v3 11/21] target-arm: Store cp15 c0_cachetype register in ARMCPUClass, Andreas Färber, 2012/02/02
- [Qemu-devel] [PATCH RFC v3 12/21] target-arm: Move cp15 c1_sys register to ARMCPUClass, Andreas Färber, 2012/02/02
- [Qemu-devel] [PATCH RFC v3 20/21] target-arm: Prepare halted property for CPU, Andreas Färber, 2012/02/02