Re: [Qemu-devel] [PATCH] PPC: Add PIR register to POWER7 CPU

[Andreas Färber]

Am 03.03.2012 17:36, schrieb Nathan Whitehorn:
> The POWER7 emulation is missing the Processor Identification Register,
> mandatory in recent POWER CPUs, that is required for SMP on at least
> some operating systems (e.g. FreeBSD) to function properly. This patch
> copies the existing PIR code from the other CPUs that implement it.
> 
> Signed-off-by: Nathan Whitehorn <address@hidden>

Please always cc the respective maintainers (and lists) according to
MAINTAINERS. CC'ing Alex and qemu-ppc.

> ---
>  target-ppc/translate_init.c |    5 +++++
>  1 files changed, 5 insertions(+), 0 deletions(-)
> 
> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
> index 8a7233f..01f4030 100644
> --- a/target-ppc/translate_init.c
> +++ b/target-ppc/translate_init.c
> @@ -6537,6 +6537,11 @@ static void init_proc_POWER7 (CPUPPCState *env)
>      /* Time base */
>      gen_tbl(env);
>  #if !defined(CONFIG_USER_ONLY)
> +    /* Processor identification */
> +    spr_register(env, SPR_PIR, "PIR",
> +                 SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_pir,

Indentation looks weird here. Stray tab maybe?

Andreas

> +                 0x00000000);
>      /* PURR & SPURR: Hack - treat these as aliases for the TB for now */
>      spr_register(env, SPR_PURR,   "PURR",
> &spr_read_purr, SPR_NOACCESS,
> -- 
> 1.7.9

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