[Qemu-devel] [PATCH 7/7] target-unicore32: Store ucf64 fpscr in UniCore32CPUClass

[Andreas Färber]

This removes the remaining CPUID dependency.

Contributed under GPLv2+.

Signed-off-by: Andreas Färber <address@hidden>
---
 target-unicore32/cpu-qom.h |    4 ++++
 target-unicore32/cpu.c     |    4 ++++
 target-unicore32/cpu.h     |    4 ----
 target-unicore32/helper.c  |   12 ------------
 4 files changed, 8 insertions(+), 16 deletions(-)

diff --git a/target-unicore32/cpu-qom.h b/target-unicore32/cpu-qom.h
index c8178a5..594df73 100644
--- a/target-unicore32/cpu-qom.h
+++ b/target-unicore32/cpu-qom.h
@@ -49,6 +49,10 @@ typedef struct UniCore32CPUClass {
         uint32_t c1_sys;
     } cp0;
 
+    struct {
+        uint32_t fpscr;
+    } ucf64;
+
     uint32_t features;
 } UniCore32CPUClass;
 
diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c
index d4b47d6..6966186 100644
--- a/target-unicore32/cpu.c
+++ b/target-unicore32/cpu.c
@@ -19,6 +19,7 @@ typedef struct UniCore32CPUInfo {
     uint32_t cp0_c0_cpuid;
     uint32_t cp0_c0_cachetype;
     uint32_t cp0_c1_sys;
+    uint32_t ucf64_fpscr;
     uint32_t features;
 } UniCore32CPUInfo;
 
@@ -30,6 +31,7 @@ static const UniCore32CPUInfo uc32_cpus[] = {
         .cp0_c0_cpuid = 0x40010863,
         .cp0_c0_cachetype = 0x1dd20d2,
         .cp0_c1_sys = 0x00090078,
+        .ucf64_fpscr = 0,
         .features = UC32_FEATURE(UC32_HWCAP_CMOV) |
                     UC32_FEATURE(UC32_HWCAP_UCF64),
     },
@@ -53,6 +55,7 @@ static void uc32_cpu_initfn(Object *obj)
     env->cp0.c0_cpuid = klass->cp0.c0_cpuid;
     env->cp0.c0_cachetype = klass->cp0.c0_cachetype;
     env->cp0.c1_sys = klass->cp0.c1_sys;
+    env->ucf64.xregs[UC32_UCF64_FPSCR] = klass->ucf64.fpscr;
     env->features = klass->features;
 
     env->uncached_asr = ASR_MODE_USER;
@@ -69,6 +72,7 @@ static void uc32_cpu_class_init(ObjectClass *klass, void 
*data)
     k->cp0.c0_cpuid = info->cp0_c0_cpuid;
     k->cp0.c0_cachetype = info->cp0_c0_cachetype;
     k->cp0.c1_sys = info->cp0_c1_sys;
+    k->ucf64.fpscr = info->ucf64_fpscr;
     k->features = info->features;
 }
 
diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
index 1ddd272..81d9e54 100644
--- a/target-unicore32/cpu.h
+++ b/target-unicore32/cpu.h
@@ -118,10 +118,6 @@ void cpu_asr_write(CPUUniCore32State *env1, target_ulong 
val, target_ulong mask)
 #define UC32_HWCAP_CMOV                 4 /* 1 << 2 */
 #define UC32_HWCAP_UCF64                8 /* 1 << 3 */
 
-#define UC32_CPUID(env)                 (env->cp0.c0_cpuid)
-#define UC32_CPUID_UCV2                 0x40010863
-#define UC32_CPUID_ANY                  0xffffffff
-
 #define cpu_init                        uc32_cpu_init
 #define cpu_exec                        uc32_cpu_exec
 #define cpu_signal_handler              uc32_cpu_signal_handler
diff --git a/target-unicore32/helper.c b/target-unicore32/helper.c
index fb6713c..39ab488 100644
--- a/target-unicore32/helper.c
+++ b/target-unicore32/helper.c
@@ -15,7 +15,6 @@ CPUUniCore32State *uc32_cpu_init(const char *cpu_model)
 {
     UniCore32CPU *cpu;
     CPUUniCore32State *env;
-    uint32_t id;
     static int inited = 1;
 
     if (object_class_by_name(cpu_model) == NULL) {
@@ -24,17 +23,6 @@ CPUUniCore32State *uc32_cpu_init(const char *cpu_model)
     cpu = UNICORE32_CPU(object_new(cpu_model));
     env = &cpu->env;
 
-    id = env->cp0.c0_cpuid;
-    switch (id) {
-    case UC32_CPUID_UCV2:
-        env->ucf64.xregs[UC32_UCF64_FPSCR] = 0;
-        break;
-    case UC32_CPUID_ANY: /* For userspace emulation.  */
-        break;
-    default:
-        cpu_abort(env, "Bad CPU ID: %x\n", id);
-    }
-
     if (inited) {
         inited = 0;
         uc32_translate_init();
-- 
1.7.7