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[Qemu-devel] [RFC 08/12] target-cris: QOM'ify CPU
From: |
Andreas Färber |
Subject: |
[Qemu-devel] [RFC 08/12] target-cris: QOM'ify CPU |
Date: |
Wed, 14 Mar 2012 18:53:32 +0100 |
Let cris_cpu_list() enumerate CPU classes sorted by version.
Signed-off-by: Andreas Färber <address@hidden>
---
Makefile.target | 1 +
target-cris/cpu-qom.h | 73 ++++++++++++++++++++++++
target-cris/cpu.c | 144 +++++++++++++++++++++++++++++++++++++++++++++++
target-cris/cpu.h | 2 +
target-cris/translate.c | 93 ++++++++++++++----------------
5 files changed, 264 insertions(+), 49 deletions(-)
create mode 100644 target-cris/cpu-qom.h
create mode 100644 target-cris/cpu.c
diff --git a/Makefile.target b/Makefile.target
index c655091..3b7a4da 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -89,6 +89,7 @@ libobj-$(CONFIG_NEED_MMU) += mmu.o
libobj-$(TARGET_ARM) += neon_helper.o iwmmxt_helper.o
libobj-$(TARGET_ALPHA) += cpu.o
libobj-$(TARGET_ARM) += cpu.o
+libobj-$(TARGET_CRIS) += cpu.o
libobj-$(TARGET_M68K) += cpu.o
ifeq ($(TARGET_BASE_ARCH), mips)
libobj-y += cpu.o
diff --git a/target-cris/cpu-qom.h b/target-cris/cpu-qom.h
new file mode 100644
index 0000000..bbd0c71
--- /dev/null
+++ b/target-cris/cpu-qom.h
@@ -0,0 +1,73 @@
+/*
+ * QEMU CRIS CPU
+ *
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see
+ * <http://www.gnu.org/licenses/lgpl-2.1.html>
+ */
+#ifndef QEMU_CRIS_CPU_QOM_H
+#define QEMU_CRIS_CPU_QOM_H
+
+#include "qemu/cpu.h"
+#include "cpu.h"
+
+#define TYPE_CRIS_CPU "cris-cpu"
+
+#define CRIS_CPU_CLASS(klass) \
+ OBJECT_CLASS_CHECK(CRISCPUClass, (klass), TYPE_CRIS_CPU)
+#define CRIS_CPU(obj) \
+ OBJECT_CHECK(CRISCPU, (obj), TYPE_CRIS_CPU)
+#define CRIS_CPU_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(CRISCPUClass, (obj), TYPE_CRIS_CPU)
+
+/**
+ * CRISCPUClass:
+ * @parent_reset: The parent class' reset handler.
+ *
+ * A CRIS CPU model.
+ */
+typedef struct CRISCPUClass {
+ /*< private >*/
+ CPUClass parent_class;
+ /*< public >*/
+
+ void (*parent_reset)(CPUState *cpu);
+
+ uint32_t vr;
+} CRISCPUClass;
+
+/**
+ * CRISCPU:
+ * @env: Legacy CPU state.
+ *
+ * A CRIS CPU.
+ */
+typedef struct CRISCPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUCRISState env;
+} CRISCPU;
+
+static inline CRISCPU *cris_env_get_cpu(CPUCRISState *env)
+{
+ return CRIS_CPU(container_of(env, CRISCPU, env));
+}
+
+#define ENV_GET_CPU(e) CPU(cris_env_get_cpu(e))
+
+
+#endif
diff --git a/target-cris/cpu.c b/target-cris/cpu.c
new file mode 100644
index 0000000..01bce90
--- /dev/null
+++ b/target-cris/cpu.c
@@ -0,0 +1,144 @@
+/*
+ * QEMU CRIS CPU
+ *
+ * Copyright (c) 2008 AXIS Communications AB
+ * Written by Edgar E. Iglesias.
+ *
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see
+ * <http://www.gnu.org/licenses/lgpl-2.1.html>
+ */
+
+#include "cpu-qom.h"
+#include "qemu-common.h"
+#include "mmu.h"
+
+static void cris_cpu_reset(CPUState *c)
+{
+ CRISCPU *cpu = CRIS_CPU(c);
+ CRISCPUClass *klass = CRIS_CPU_GET_CLASS(cpu);
+ CPUCRISState *env = &cpu->env;
+
+ if (qemu_loglevel_mask(CPU_LOG_RESET)) {
+ qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
+ log_cpu_state(env, 0);
+ }
+
+ klass->parent_reset(c);
+
+ memset(env, 0, offsetof(CPUCRISState, breakpoints));
+ env->pregs[PR_VR] = klass->vr;
+ tlb_flush(env, 1);
+
+#if defined(CONFIG_USER_ONLY)
+ /* start in user mode with interrupts enabled. */
+ env->pregs[PR_CCS] |= U_FLAG | I_FLAG | P_FLAG;
+#else
+ cris_mmu_init(env);
+ env->pregs[PR_CCS] = 0;
+#endif
+}
+
+/* CPU models */
+
+typedef struct CRISCPUInfo {
+ const char *name;
+ uint32_t vr;
+} CRISCPUInfo;
+
+static const CRISCPUInfo cris_cpus[] = {
+ {
+ .name = "crisv8",
+ .vr = 8,
+ },
+ {
+ .name = "crisv9",
+ .vr = 9,
+ },
+ {
+ .name = "crisv10",
+ .vr = 10,
+ },
+ {
+ .name = "crisv11",
+ .vr = 11,
+ },
+ {
+ .name = "crisv32",
+ .vr = 32,
+ },
+};
+
+static void cris_cpu_initfn(Object *obj)
+{
+ CRISCPU *cpu = CRIS_CPU(obj);
+ CRISCPUClass *klass = CRIS_CPU_GET_CLASS(cpu);
+ CPUCRISState *env = &cpu->env;
+
+ memset(env, 0, sizeof(*env));
+ cpu_exec_init(env);
+ env->cpu_model_str = object_get_typename(obj);
+
+ env->pregs[PR_VR] = klass->vr;
+
+ cpu_reset(CPU(cpu));
+}
+
+static void cris_cpu_class_init(ObjectClass *klass, void *data)
+{
+ CPUClass *cpu_class = CPU_CLASS(klass);
+ CRISCPUClass *k = CRIS_CPU_CLASS(klass);
+ const CRISCPUInfo *info = data;
+
+ k->parent_reset = cpu_class->reset;
+ cpu_class->reset = cris_cpu_reset;
+
+ k->vr = info->vr;
+}
+
+static void cpu_register(const CRISCPUInfo *info)
+{
+ TypeInfo type = {
+ .name = info->name,
+ .parent = TYPE_CRIS_CPU,
+ .instance_size = sizeof(CRISCPU),
+ .instance_init = cris_cpu_initfn,
+ .class_size = sizeof(CRISCPUClass),
+ .class_init = cris_cpu_class_init,
+ .class_data = (void *)info,
+ };
+
+ type_register_static(&type);
+}
+
+static const TypeInfo cris_cpu_type_info = {
+ .name = TYPE_CRIS_CPU,
+ .parent = TYPE_CPU,
+ .instance_size = sizeof(CRISCPU),
+ .abstract = true,
+ .class_size = sizeof(CRISCPUClass),
+};
+
+static void cris_cpu_register_types(void)
+{
+ int i;
+
+ type_register_static(&cris_cpu_type_info);
+ for (i = 0; i < ARRAY_SIZE(cris_cpus); i++) {
+ cpu_register(&cris_cpus[i]);
+ }
+}
+
+type_init(cris_cpu_register_types)
diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index 31899c2..5449cc4 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -169,6 +169,8 @@ typedef struct CPUCRISState {
void *load_info;
} CPUCRISState;
+#include "cpu-qom.h"
+
CPUCRISState *cpu_cris_init(const char *cpu_model);
int cpu_cris_exec(CPUCRISState *s);
void cpu_cris_close(CPUCRISState *s);
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 7224f46..4097ecd 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3470,50 +3470,63 @@ void cpu_dump_state (CPUCRISState *env, FILE *f,
fprintf_function cpu_fprintf,
}
-struct
-{
- uint32_t vr;
- const char *name;
-} cris_cores[] = {
- {8, "crisv8"},
- {9, "crisv9"},
- {10, "crisv10"},
- {11, "crisv11"},
- {32, "crisv32"},
-};
+typedef struct CRISCPUListState {
+ fprintf_function cpu_fprintf;
+ FILE *file;
+} CRISCPUListState;
-void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf)
+/* Sort by version. */
+static gint cris_cpu_list_compare(gconstpointer a, gconstpointer b)
{
- unsigned int i;
+ CRISCPUClass *class_a = CRIS_CPU_CLASS(a);
+ CRISCPUClass *class_b = CRIS_CPU_CLASS(b);
- (*cpu_fprintf)(f, "Available CPUs:\n");
- for (i = 0; i < ARRAY_SIZE(cris_cores); i++) {
- (*cpu_fprintf)(f, " %s\n", cris_cores[i].name);
+ if (class_a->vr == class_b->vr) {
+ return 0;
+ } else if (class_a->vr > class_b->vr) {
+ return 1;
+ } else {
+ return -1;
}
}
-static uint32_t vr_by_name(const char *name)
+static void cris_cpu_list_entry(gpointer data, gpointer user_data)
{
- unsigned int i;
- for (i = 0; i < ARRAY_SIZE(cris_cores); i++) {
- if (strcmp(name, cris_cores[i].name) == 0) {
- return cris_cores[i].vr;
- }
- }
- return 32;
+ ObjectClass *klass = data;
+ CRISCPUListState *s = user_data;
+
+ (*s->cpu_fprintf)(s->file, " %s\n",
+ object_class_get_name(klass));
}
-CPUCRISState *cpu_cris_init (const char *cpu_model)
+void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf)
{
- CPUCRISState *env;
+ CRISCPUListState s = {
+ .file = f,
+ .cpu_fprintf = cpu_fprintf,
+ };
+ GSList *list;
+
+ list = object_class_get_list(TYPE_CRIS_CPU, false);
+ list = g_slist_sort(list, cris_cpu_list_compare);
+ (*cpu_fprintf)(f, "Available CPUs:\n");
+ g_slist_foreach(list, cris_cpu_list_entry, &s);
+ g_slist_free(list);
+}
+
+CPUCRISState *cpu_cris_init(const char *cpu_model)
+{
+ CRISCPU *cpu;
+ CPUCRISState *env;
static int tcg_initialized = 0;
int i;
- env = g_malloc0(sizeof(CPUCRISState));
+ if (object_class_by_name(cpu_model) == NULL) {
+ return NULL;
+ }
+ cpu = CRIS_CPU(object_new(cpu_model));
+ env = &cpu->env;
- env->pregs[PR_VR] = vr_by_name(cpu_model);
- cpu_exec_init(env);
- cpu_state_reset(env);
qemu_init_vcpu(env);
if (tcg_initialized)
@@ -3575,25 +3588,7 @@ CPUCRISState *cpu_cris_init (const char *cpu_model)
void cpu_state_reset(CPUCRISState *env)
{
- uint32_t vr;
-
- if (qemu_loglevel_mask(CPU_LOG_RESET)) {
- qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
- log_cpu_state(env, 0);
- }
-
- vr = env->pregs[PR_VR];
- memset(env, 0, offsetof(CPUCRISState, breakpoints));
- env->pregs[PR_VR] = vr;
- tlb_flush(env, 1);
-
-#if defined(CONFIG_USER_ONLY)
- /* start in user mode with interrupts enabled. */
- env->pregs[PR_CCS] |= U_FLAG | I_FLAG | P_FLAG;
-#else
- cris_mmu_init(env);
- env->pregs[PR_CCS] = 0;
-#endif
+ cpu_reset(ENV_GET_CPU(env));
}
void restore_state_to_opc(CPUCRISState *env, TranslationBlock *tb, int pc_pos)
--
1.7.7
- [Qemu-devel] [PATCH 06/12] target-sh4: Make find_*tlb_entry() take SuperHCPU, (continued)
- [Qemu-devel] [RFC 00/12] QOM'ify remaining CPUs, Andreas Färber, 2012/03/15
- [Qemu-devel] [RFC 04/12] target-alpha: QOM'ify CPU, Andreas Färber, 2012/03/14
- [Qemu-devel] [RFC 07/12] target-ppc: Prepare finalizer for PowerPCCPU, Andreas Färber, 2012/03/14
- [Qemu-devel] [RFC 10/12] target-microblaze: QOM'ify CPU, Andreas Färber, 2012/03/14
- [Qemu-devel] [RFC 06/12] target-ppc: QOM'ify CPU, Andreas Färber, 2012/03/14
- [Qemu-devel] [RFC 03/12] target-m68k: QOM'ify CPU, Andreas Färber, 2012/03/14
- [Qemu-devel] [RFC 08/12] target-cris: QOM'ify CPU,
Andreas Färber <=
- [Qemu-devel] [RFC 09/12] target-lm32: QOM'ify CPU, Andreas Färber, 2012/03/14
- [Qemu-devel] [RFC 01/12] target-s390x: QOM'ify CPU, Andreas Färber, 2012/03/14
- [Qemu-devel] [RFC 12/12] target-xtensa: QOM'ify CPU, Andreas Färber, 2012/03/14
- [Qemu-devel] [RFC 11/12] target-sparc: QOM'ify CPU, Andreas Färber, 2012/03/14