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[Qemu-devel] [PATCH 2/4] arm: make sure that number of irqs can be repre
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 2/4] arm: make sure that number of irqs can be represented in GICD_TYPER. |
Date: |
Fri, 16 Mar 2012 18:12:50 +0000 |
From: Rusty Russell <address@hidden>
We currently assume that the number of interrupts (ITLinesNumber in
the architecture reference manual) is divisible by 32, since we
present it to the guest when it reads GICD_TYPER (in gic_dist_readb())
as (N / 32) - 1.
Signed-off-by: Rusty Russell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm_gic.c | 9 +++++++++
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/hw/arm_gic.c b/hw/arm_gic.c
index 59eabcc..d8a7a19 100644
--- a/hw/arm_gic.c
+++ b/hw/arm_gic.c
@@ -819,6 +819,15 @@ static void gic_init(gic_state *s, int num_irq)
hw_error("requested %u interrupt lines exceeds GIC maximum %d\n",
num_irq, GIC_MAXIRQ);
}
+ /* ITLinesNumber is represented as (N / 32) - 1 (see
+ * gic_dist_readb) so this is an implementation imposed
+ * restriction, not an architectural one:
+ */
+ if (s->num_irq < 32 || (s->num_irq % 32)) {
+ hw_error("%d interrupt lines unsupported: not divisible by 32\n",
+ num_irq);
+ }
+
qdev_init_gpio_in(&s->busdev.qdev, gic_set_irq, s->num_irq - GIC_INTERNAL);
for (i = 0; i < NUM_CPU(s); i++) {
sysbus_init_irq(&s->busdev, &s->parent_irq[i]);
--
1.7.1
- [Qemu-devel] [PULL 0/4] arm-devs queue, Peter Maydell, 2012/03/02
- [Qemu-devel] [PATCH 4/4] hw/arm11mpcore: Fix broken realview_mpcore/arm11mpcore_priv properties, Peter Maydell, 2012/03/02
- [Qemu-devel] [PATCH 3/4] arm: add device tree support, Peter Maydell, 2012/03/02
- [Qemu-devel] [PATCH 2/4] arm: make sure that number of irqs can be represented in GICD_TYPER., Peter Maydell, 2012/03/02
- [Qemu-devel] [PATCH 1/4] arm: clean up GIC constants, Peter Maydell, 2012/03/02
- Re: [Qemu-devel] [PULL 0/4] arm-devs queue, Blue Swirl, 2012/03/03