Re: [Qemu-devel] [PATCH] w64: Fix data type of next_tb and tcg_qemu_tb_exec

[Blue Swirl]

Thanks, applied.

On Fri, Mar 16, 2012 at 22:50, Stefan Weil <address@hidden> wrote:
> next_tb is the numeric value of a tcg target (= QEMU host) address.
>
> Using tcg_target_ulong instead of unsigned long shows this and makes
> the code portable for hosts with an unusual size of long (w64).
>
> The type cast '(long)(next_tb & ~3)' was not needed (casting
> unsigned long to long does not change the bits, and nor does
> casting long to pointer for most (= all non w64) hosts.
> It is removed here.
>
> Macro or function tcg_qemu_tb_exec is used to set next_tb.
> The function also returns next_tb. Therefore tcg_qemu_tb_exec
> must return a tcg_target_ulong.
>
> Signed-off-by: Stefan Weil <address@hidden>
> ---
>  cpu-exec.c           |    6 +++---
>  tcg/tcg.h            |    2 +-
>  tcg/tci/tcg-target.h |    2 +-
>  tci.c                |    4 ++--
>  4 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/cpu-exec.c b/cpu-exec.c
> index bd5791f..0fa8325 100644
> --- a/cpu-exec.c
> +++ b/cpu-exec.c
> @@ -55,7 +55,7 @@ void cpu_resume_from_signal(CPUArchState *env, void *puc)
>  static void cpu_exec_nocache(CPUArchState *env, int max_cycles,
>                              TranslationBlock *orig_tb)
>  {
> -    unsigned long next_tb;
> +    tcg_target_ulong next_tb;
>     TranslationBlock *tb;
>
>     /* Should never happen.
> @@ -186,7 +186,7 @@ int cpu_exec(CPUArchState *env)
>     int ret, interrupt_request;
>     TranslationBlock *tb;
>     uint8_t *tc_ptr;
> -    unsigned long next_tb;
> +    tcg_target_ulong next_tb;
>
>     if (env->halted) {
>         if (!cpu_has_work(env)) {
> @@ -565,7 +565,7 @@ int cpu_exec(CPUArchState *env)
>                     if ((next_tb & 3) == 2) {
>                         /* Instruction counter expired.  */
>                         int insns_left;
> -                        tb = (TranslationBlock *)(long)(next_tb & ~3);
> +                        tb = (TranslationBlock *)(next_tb & ~3);
>                         /* Restore PC.  */
>                         cpu_pc_from_tb(env, tb);
>                         insns_left = env->icount_decr.u32;
> diff --git a/tcg/tcg.h b/tcg/tcg.h
> index cc223ea..1d23d40 100644
> --- a/tcg/tcg.h
> +++ b/tcg/tcg.h
> @@ -589,5 +589,5 @@ extern uint8_t code_gen_prologue[];
>  /* TCG targets may use a different definition of tcg_qemu_tb_exec. */
>  #if !defined(tcg_qemu_tb_exec)
>  # define tcg_qemu_tb_exec(env, tb_ptr) \
> -    ((long REGPARM (*)(void *, void *))code_gen_prologue)(env, tb_ptr)
> +    ((tcg_target_ulong REGPARM (*)(void *, void *))code_gen_prologue)(env, 
> tb_ptr)
>  #endif
> diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h
> index b61e99a..30a0f21 100644
> --- a/tcg/tci/tcg-target.h
> +++ b/tcg/tci/tcg-target.h
> @@ -154,7 +154,7 @@ typedef enum {
>
>  void tci_disas(uint8_t opc);
>
> -unsigned long tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr);
> +tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr);
>  #define tcg_qemu_tb_exec tcg_qemu_tb_exec
>
>  static inline void flush_icache_range(tcg_target_ulong start,
> diff --git a/tci.c b/tci.c
> index fb9ebef..70e7bfb 100644
> --- a/tci.c
> +++ b/tci.c
> @@ -429,9 +429,9 @@ static bool tci_compare64(uint64_t u0, uint64_t u1, 
> TCGCond condition)
>  }
>
>  /* Interpret pseudo code in tb. */
> -unsigned long tcg_qemu_tb_exec(CPUArchState *cpustate, uint8_t *tb_ptr)
> +tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *cpustate, uint8_t *tb_ptr)
>  {
> -    unsigned long next_tb = 0;
> +    tcg_target_ulong next_tb = 0;
>
>     env = cpustate;
>     tci_reg[TCG_AREG0] = (tcg_target_ulong)env;
> --
> 1.7.9
>
>