From 48bcefb281667aa1e2578635bf6097a045037095 Mon Sep 17 00:00:00 2001 Message-Id: In-Reply-To: References: From: Blue Swirl Date: Sun, 25 Mar 2012 19:34:11 +0000 Subject: [PATCH 17/20] ppc: split off misc helpers Signed-off-by: Blue Swirl --- Makefile.target | 5 ++- target-ppc/misc_helper.c | 116 ++++++++++++++++++++++++++++++++++++++++++++++ target-ppc/op_helper.c | 94 ------------------------------------- 3 files changed, 120 insertions(+), 95 deletions(-) create mode 100644 target-ppc/misc_helper.c diff --git a/Makefile.target b/Makefile.target index 30b4e48..da0e0e2 100644 --- a/Makefile.target +++ b/Makefile.target @@ -104,7 +104,7 @@ libobj-$(TARGET_UNICORE32) += cpu.o libobj-$(TARGET_ALPHA) += int_helper.o fpu_helper.o sys_helper.o mem_helper.o ifeq ($(TARGET_BASE_ARCH), ppc) libobj-y += fpu_helper.o int_helper.o mmu_helper.o -libobj-y += mmu_helper.o excp_helper.o timebase_helper.o +libobj-y += mmu_helper.o excp_helper.o timebase_helper.o misc_helper.o endif libobj-y += disas.o @@ -119,6 +119,9 @@ $(libobj-y): $(GENERATED_HEADERS) ifneq ($(TARGET_BASE_ARCH), sparc) op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) endif +ifeq ($(TARGET_BASE_ARCH), ppc) +misc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) +endif user-exec.o: QEMU_CFLAGS += $(HELPER_CFLAGS) # Note: this is a workaround. The real fix is to avoid compiling diff --git a/target-ppc/misc_helper.c b/target-ppc/misc_helper.c new file mode 100644 index 0000000..67eab08 --- /dev/null +++ b/target-ppc/misc_helper.c @@ -0,0 +1,116 @@ +/* + * Miscellaneous PowerPC emulation helpers for QEMU. + * + * Copyright (c) 2003-2007 Jocelyn Mayer + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ +#include "cpu.h" +#include "dyngen-exec.h" +#include "helper.h" + +#include "helper_regs.h" + +/*****************************************************************************/ +/* SPR accesses */ +void helper_load_dump_spr(uint32_t sprn) +{ + qemu_log("Read SPR %d %03x => " TARGET_FMT_lx "\n", sprn, sprn, + env->spr[sprn]); +} + +void helper_store_dump_spr(uint32_t sprn) +{ + qemu_log("Write SPR %d %03x <= " TARGET_FMT_lx "\n", sprn, sprn, + env->spr[sprn]); +} +#if !defined(CONFIG_USER_ONLY) +#if defined(TARGET_PPC64) +void helper_store_asr(target_ulong val) +{ + ppc_store_asr(env, val); +} +#endif + +void helper_store_sdr1(target_ulong val) +{ + ppc_store_sdr1(env, val); +} + +void helper_store_hid0_601(target_ulong val) +{ + target_ulong hid0; + + hid0 = env->spr[SPR_HID0]; + if ((val ^ hid0) & 0x00000008) { + /* Change current endianness */ + env->hflags &= ~(1 << MSR_LE); + env->hflags_nmsr &= ~(1 << MSR_LE); + env->hflags_nmsr |= (1 << MSR_LE) & (((val >> 3) & 1) << MSR_LE); + env->hflags |= env->hflags_nmsr; + qemu_log("%s: set endianness to %c => " TARGET_FMT_lx "\n", __func__, + val & 0x8 ? 'l' : 'b', env->hflags); + } + env->spr[SPR_HID0] = (uint32_t)val; +} + +void helper_store_403_pbr(uint32_t num, target_ulong value) +{ + if (likely(env->pb[num] != value)) { + env->pb[num] = value; + /* Should be optimized */ + tlb_flush(env, 1); + } +} + +void helper_store_40x_dbcr0(target_ulong val) +{ + store_40x_dbcr0(env, val); +} + +void helper_store_40x_sler(target_ulong val) +{ + store_40x_sler(env, val); +} +#endif +/*****************************************************************************/ +/* PowerPC 601 specific instructions (POWER bridge) */ + +target_ulong helper_clcs(uint32_t arg) +{ + switch (arg) { + case 0x0CUL: + /* Instruction cache line size */ + return env->icache_line_size; + break; + case 0x0DUL: + /* Data cache line size */ + return env->dcache_line_size; + break; + case 0x0EUL: + /* Minimum cache line size */ + return (env->icache_line_size < env->dcache_line_size) ? + env->icache_line_size : env->dcache_line_size; + break; + case 0x0FUL: + /* Maximum cache line size */ + return (env->icache_line_size > env->dcache_line_size) ? + env->icache_line_size : env->dcache_line_size; + break; + default: + /* Undefined */ + return 0; + break; + } +} diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index 29dee0a..dcdbf5f 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -29,69 +29,6 @@ #endif /* !defined(CONFIG_USER_ONLY) */ /*****************************************************************************/ -/* SPR accesses */ -void helper_load_dump_spr(uint32_t sprn) -{ - qemu_log("Read SPR %d %03x => " TARGET_FMT_lx "\n", sprn, sprn, - env->spr[sprn]); -} - -void helper_store_dump_spr(uint32_t sprn) -{ - qemu_log("Write SPR %d %03x <= " TARGET_FMT_lx "\n", sprn, sprn, - env->spr[sprn]); -} -#if !defined(CONFIG_USER_ONLY) -#if defined(TARGET_PPC64) -void helper_store_asr(target_ulong val) -{ - ppc_store_asr(env, val); -} -#endif - -void helper_store_sdr1(target_ulong val) -{ - ppc_store_sdr1(env, val); -} - -void helper_store_hid0_601(target_ulong val) -{ - target_ulong hid0; - - hid0 = env->spr[SPR_HID0]; - if ((val ^ hid0) & 0x00000008) { - /* Change current endianness */ - env->hflags &= ~(1 << MSR_LE); - env->hflags_nmsr &= ~(1 << MSR_LE); - env->hflags_nmsr |= (1 << MSR_LE) & (((val >> 3) & 1) << MSR_LE); - env->hflags |= env->hflags_nmsr; - qemu_log("%s: set endianness to %c => " TARGET_FMT_lx "\n", __func__, - val & 0x8 ? 'l' : 'b', env->hflags); - } - env->spr[SPR_HID0] = (uint32_t)val; -} - -void helper_store_403_pbr(uint32_t num, target_ulong value) -{ - if (likely(env->pb[num] != value)) { - env->pb[num] = value; - /* Should be optimized */ - tlb_flush(env, 1); - } -} - -void helper_store_40x_dbcr0(target_ulong val) -{ - store_40x_dbcr0(env, val); -} - -void helper_store_40x_sler(target_ulong val) -{ - store_40x_sler(env, val); -} -#endif - -/*****************************************************************************/ /* Memory load and stores */ static inline target_ulong addr_add(target_ulong addr, target_long arg) @@ -250,37 +187,6 @@ target_ulong helper_lscbx(target_ulong addr, uint32_t reg, uint32_t ra, } /*****************************************************************************/ -/* PowerPC 601 specific instructions (POWER bridge) */ - -target_ulong helper_clcs(uint32_t arg) -{ - switch (arg) { - case 0x0CUL: - /* Instruction cache line size */ - return env->icache_line_size; - break; - case 0x0DUL: - /* Data cache line size */ - return env->dcache_line_size; - break; - case 0x0EUL: - /* Minimum cache line size */ - return (env->icache_line_size < env->dcache_line_size) ? - env->icache_line_size : env->dcache_line_size; - break; - case 0x0FUL: - /* Maximum cache line size */ - return (env->icache_line_size > env->dcache_line_size) ? - env->icache_line_size : env->dcache_line_size; - break; - default: - /* Undefined */ - return 0; - break; - } -} - -/*****************************************************************************/ /* Altivec extension helpers */ #if defined(HOST_WORDS_BIGENDIAN) #define HI_IDX 0 -- 1.7.2.5