Re: [Qemu-devel] [PATCH 6/9] Fix bit test to use & instead of && and enable -Wlogical-op warning

[Peter Maydell]

On 2 April 2012 11:50, Daniel P. Berrange <address@hidden> wrote:
> diff --git a/hw/exynos4210_uart.c b/hw/exynos4210_uart.c
> index 73a9c18..4b20105 100644
> --- a/hw/exynos4210_uart.c
> +++ b/hw/exynos4210_uart.c
> @@ -246,7 +246,7 @@ static uint32_t 
> exynos4210_uart_Tx_FIFO_trigger_level(Exynos4210UartState *s)
>     uint32_t level = 0;
>     uint32_t reg;
>
> -    reg = (s->reg[I_(UFCON)] && UFCON_Tx_FIFO_TRIGGER_LEVEL) >>
> +    reg = (s->reg[I_(UFCON)] & UFCON_Tx_FIFO_TRIGGER_LEVEL) >>
>             UFCON_Tx_FIFO_TRIGGER_LEVEL_SHIFT;
>
>     switch (s->channel) {
> @@ -277,7 +277,7 @@ static void 
> exynos4210_uart_update_irq(Exynos4210UartState *s)
>      */
>     if (s->reg[I_(UFCON)] && UFCON_FIFO_ENABLE) {
>
> -        uint32_t count = (s->reg[I_(UFSTAT)] && UFSTAT_Tx_FIFO_COUNT) >>
> +        uint32_t count = (s->reg[I_(UFSTAT)] & UFSTAT_Tx_FIFO_COUNT) >>
>                 UFSTAT_Tx_FIFO_COUNT_SHIFT;
>
>         if (count <= exynos4210_uart_Tx_FIFO_trigger_level(s)) {

Nice catch. Note that the '&& UFCON_FIFO_ENABLE' you can see in the context
to the second hunk is also wrong and needs fixing.

I'll take the exynos changes via arm-devs.next, but not the configure
change. Please can you submit a version of the patch that only fixes
the bugs and doesn't also change the gcc warning flags?

thanks
-- PMM