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[Qemu-devel] [PATCH 01/16] Fix bit test in Exynos4210 UART emulation to
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 01/16] Fix bit test in Exynos4210 UART emulation to use & instead of && |
Date: |
Fri, 13 Apr 2012 14:04:46 +0100 |
From: Daniel P. Berrange <address@hidden>
* hw/exynos4210_uart.c: s/&&/&/
Signed-off-by: Daniel P. Berrange <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/exynos4210_uart.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/exynos4210_uart.c b/hw/exynos4210_uart.c
index 73a9c18..ccc4780 100644
--- a/hw/exynos4210_uart.c
+++ b/hw/exynos4210_uart.c
@@ -246,7 +246,7 @@ static uint32_t
exynos4210_uart_Tx_FIFO_trigger_level(Exynos4210UartState *s)
uint32_t level = 0;
uint32_t reg;
- reg = (s->reg[I_(UFCON)] && UFCON_Tx_FIFO_TRIGGER_LEVEL) >>
+ reg = (s->reg[I_(UFCON)] & UFCON_Tx_FIFO_TRIGGER_LEVEL) >>
UFCON_Tx_FIFO_TRIGGER_LEVEL_SHIFT;
switch (s->channel) {
@@ -275,9 +275,9 @@ static void exynos4210_uart_update_irq(Exynos4210UartState
*s)
* The Tx interrupt is always requested if the number of data in the
* transmit FIFO is smaller than the trigger level.
*/
- if (s->reg[I_(UFCON)] && UFCON_FIFO_ENABLE) {
+ if (s->reg[I_(UFCON)] & UFCON_FIFO_ENABLE) {
- uint32_t count = (s->reg[I_(UFSTAT)] && UFSTAT_Tx_FIFO_COUNT) >>
+ uint32_t count = (s->reg[I_(UFSTAT)] & UFSTAT_Tx_FIFO_COUNT) >>
UFSTAT_Tx_FIFO_COUNT_SHIFT;
if (count <= exynos4210_uart_Tx_FIFO_trigger_level(s)) {
--
1.7.1
- [Qemu-devel] [PULL 00/16] arm-devs queue, Peter Maydell, 2012/04/13
- [Qemu-devel] [PATCH 15/16] hw/arm_gic: gic_set_pending_private() is NVIC only, Peter Maydell, 2012/04/13
- [Qemu-devel] [PATCH 13/16] hw/arm_gic: Make gic_reset a sysbus reset function, Peter Maydell, 2012/04/13
- [Qemu-devel] [PATCH 01/16] Fix bit test in Exynos4210 UART emulation to use & instead of &&,
Peter Maydell <=
- [Qemu-devel] [PATCH 08/16] hw/a15mpcore: switch to using sysbus GIC, Peter Maydell, 2012/04/13
- [Qemu-devel] [PATCH 12/16] hw/arm11mpcore: Convert to using sysbus GIC device, Peter Maydell, 2012/04/13
- [Qemu-devel] [PATCH 11/16] hw/exynos4210_gic: Convert to using sysbus GIC, Peter Maydell, 2012/04/13
- [Qemu-devel] [PATCH 04/16] hw/arm_gic: Move NCPU definition to arm_gic.c, Peter Maydell, 2012/04/13
- [Qemu-devel] [PATCH 10/16] hw/realview_gic: switch to sysbus GIC, Peter Maydell, 2012/04/13
- [Qemu-devel] [PATCH 09/16] hw/a9mpcore: Switch to using sysbus GIC, Peter Maydell, 2012/04/13
- [Qemu-devel] [PATCH 03/16] hw/exynos4210_combiner.c: Drop excessive read/write access check., Peter Maydell, 2012/04/13
- [Qemu-devel] [PATCH 06/16] hw/arm_gic: Expose PPI inputs as gpio inputs, Peter Maydell, 2012/04/13
- [Qemu-devel] [PATCH 02/16] ARM: Exynos4210: Drop gic_cpu_write() after initialization., Peter Maydell, 2012/04/13
- [Qemu-devel] [PATCH 05/16] hw/arm_gic: Move gic_get_current_cpu into arm_gic.c, Peter Maydell, 2012/04/13