Re: [Qemu-devel] [PATCH] Undefine SWP instruction unless SCTLR.SW bit is set

[Alexey Starikovskiy]

On 04/17/2012 03:55 PM, Peter Maydell wrote:
> On 17 April 2012 12:39, Alexey Starikovskiy<address@hidden>  wrote:
>
> Patches should almost always have more than a single line
> commit message in my opinion.
Ok
> > Signed-off-by: Alexey Starikovskiy<address@hidden>
> > ---
> >   target-arm/translate.c |    6 ++++++
> >   1 files changed, 6 insertions(+), 0 deletions(-)
> >
> > diff --git a/target-arm/translate.c b/target-arm/translate.c
> > index 7a3c7d6..b35c85f 100644
> > --- a/target-arm/translate.c
> > +++ b/target-arm/translate.c
> > @@ -7415,6 +7415,12 @@ static void disas_arm_insn(CPUARMState * env,
> > DisasContext *s)
> >                          }
> >                          tcg_temp_free(addr);
> >                      } else {
> > +                        if (!(env->cp15.c1_sys&  (1<<  10))) {
> This is wrong -- on CPUs without the Multiprocessing Extensions
> SCTLR.SW is always zero but the SWP instructions work.
You mean ARM_FEATURE_V7MP or something else?
> > +                            /* Check if SCTLR.SW is set. Any change to SCTLR
> > +                             * invalidates all translations, so we are safe.
> > +                             */
> This isn't true -- SCTLR writes currently do a tlb_flush() but
> not a tb_flush().
Right...
> -- PMM