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Re: [Qemu-devel] [PATCHv2 3/3] virtio: order index/descriptor reads


From: Paolo Bonzini
Subject: Re: [Qemu-devel] [PATCHv2 3/3] virtio: order index/descriptor reads
Date: Tue, 24 Apr 2012 18:15:56 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:11.0) Gecko/20120329 Thunderbird/11.0.1

Il 24/04/2012 18:08, Michael S. Tsirkin ha scritto:
> On Tue, Apr 24, 2012 at 05:40:07PM +0200, Paolo Bonzini wrote:
>>>>>> I would be grateful if, instead of fixing the qemu-barrier.h parts of
>>>>>> the patches, you picked up the (sole) patch in the atomics branch of
>>>>>> git://github.com/bonzini/qemu.git.  The constructs there are more
>>>>>> complete than what we have in qemu-barrier.h,
>>>>>
>>>>> Sorry this is just a bugfix in virtio, don't see a reason to make
>>>>> it depend on a wholesale rework of atomics.
>>>>
>>>> The reason is that your fixes didn't work on PPC, and were suboptimal on
>>>> x86
>>>
>>> I'll fix PPC but I'll stick to the barriers the way Linux implements
>>> them. They pairing rules for these are well documented so we
>>> just need to stick to the rules.
>>
>> Sure, and smp_rmb() *is* a no-op on Linux:
>>
>> #ifdef CONFIG_SMP
>> #define smp_mb()        mb()
>> #ifdef CONFIG_X86_PPRO_FENCE
>> # define smp_rmb()      rmb()        <-- this is an lfence on x86_64
>> #else
>> # define smp_rmb()      barrier()    <-- this is not
>> #endif
>> #ifdef CONFIG_X86_OOSTORE
>> # define smp_wmb()      wmb()
>> #else
>> # define smp_wmb()      barrier()
>> #endif
>> #endif
> 
> Hmm, you are right. I'll make it a compiler barrier and add a comment
> similar to wmb on x86 explaining that we don't use non-temporals.
> Thanks for clarifying this.

No problem. :)

If you search the qemu-devel archives you can find me saying very wrong
things on memory barriers.  When I realized that I did my homework, and
the homework was the atomics patch.

BTW, one of the authors of the C11 atomics stuff is Paul McKenney, so
there is some cross-pollination between C and Linux atomics.

Paolo





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