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[Qemu-devel] [PATCHv2 03/13] unicore32-softmmu: Make UniCore32 cpuid & e
From: |
Guan Xuetao |
Subject: |
[Qemu-devel] [PATCHv2 03/13] unicore32-softmmu: Make UniCore32 cpuid & exceptions correct and runable |
Date: |
Fri, 15 Jun 2012 17:47:36 +0800 |
This patch initializes the cpuid to exactly correct value because
linux kernel will check it. Also UC32_CPUID_* are removed.
In addition, the exception types are specified in proper situations.
Then it could make exceptions generated correctly and timely.
Signed-off-by: Guan Xuetao <address@hidden>
---
cpu-exec.c | 1 +
linux-user/main.c | 3 ++-
target-unicore32/cpu.c | 25 ++++++++++++++++---------
target-unicore32/cpu.h | 12 +++++-------
4 files changed, 24 insertions(+), 17 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index 0344cd5..929b535 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -416,6 +416,7 @@ int cpu_exec(CPUArchState *env)
#elif defined(TARGET_UNICORE32)
if (interrupt_request & CPU_INTERRUPT_HARD
&& !(env->uncached_asr & ASR_I)) {
+ env->exception_index = UC32_EXCP_INTR;
do_interrupt(env);
next_tb = 0;
}
diff --git a/linux-user/main.c b/linux-user/main.c
index 191b750..a394409 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -958,7 +958,8 @@ void cpu_loop(CPUUniCore32State *env)
}
}
break;
- case UC32_EXCP_TRAP:
+ case UC32_EXCP_DTRAP:
+ case UC32_EXCP_ITRAP:
info.si_signo = SIGSEGV;
info.si_errno = 0;
/* XXX: check env->error_code */
diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c
index de63f58..f296420 100644
--- a/target-unicore32/cpu.c
+++ b/target-unicore32/cpu.c
@@ -1,15 +1,13 @@
/*
* QEMU UniCore32 CPU
*
- * Copyright (c) 2010-2011 GUAN Xue-tao
+ * Copyright (c) 2010-2012 Guan Xuetao
* Copyright (c) 2012 SUSE LINUX Products GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Contributions from 2012-04-01 on are considered under GPL version 2,
- * or (at your option) any later version.
+ * published by the Free Software Foundation, or any later version.
+ * See the COPYING file in the top-level directory.
*/
#include "cpu-qom.h"
@@ -32,13 +30,16 @@ static void unicore_ii_cpu_initfn(Object *obj)
UniCore32CPU *cpu = UNICORE32_CPU(obj);
CPUUniCore32State *env = &cpu->env;
- env->cp0.c0_cpuid = 0x40010863;
+ env->cp0.c0_cpuid = 0x4d000863;
+ env->cp0.c0_cachetype = 0x0d152152;
+ env->cp0.c1_sys = 0x2000;
+ env->cp0.c2_base = 0x0;
+ env->cp0.c3_faultstatus = 0x0;
+ env->cp0.c4_faultaddr = 0x0;
+ env->ucf64.xregs[UC32_UCF64_FPSCR] = 0;
set_feature(env, UC32_HWCAP_CMOV);
set_feature(env, UC32_HWCAP_UCF64);
- env->ucf64.xregs[UC32_UCF64_FPSCR] = 0;
- env->cp0.c0_cachetype = 0x1dd20d2;
- env->cp0.c1_sys = 0x00090078;
}
static void uc32_any_cpu_initfn(Object *obj)
@@ -47,6 +48,7 @@ static void uc32_any_cpu_initfn(Object *obj)
CPUUniCore32State *env = &cpu->env;
env->cp0.c0_cpuid = 0xffffffff;
+ env->ucf64.xregs[UC32_UCF64_FPSCR] = 0;
set_feature(env, UC32_HWCAP_CMOV);
set_feature(env, UC32_HWCAP_UCF64);
@@ -65,8 +67,13 @@ static void uc32_cpu_initfn(Object *obj)
cpu_exec_init(env);
env->cpu_model_str = object_get_typename(obj);
+#ifdef CONFIG_USER_ONLY
env->uncached_asr = ASR_MODE_USER;
env->regs[31] = 0;
+#else
+ env->uncached_asr = ASR_MODE_PRIV;
+ env->regs[31] = 0x03000000;
+#endif
tlb_flush(env, 1);
}
diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
index 81c14ff..ff99bda 100644
--- a/target-unicore32/cpu.h
+++ b/target-unicore32/cpu.h
@@ -1,7 +1,7 @@
/*
* UniCore32 virtual CPU header
*
- * Copyright (C) 2010-2011 GUAN Xue-tao
+ * Copyright (C) 2010-2012 Guan Xuetao
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -89,8 +89,10 @@ typedef struct CPUUniCore32State {
#define ASR_NZCV (ASR_N | ASR_Z | ASR_C | ASR_V)
#define ASR_RESERVED (~(ASR_M | ASR_I | ASR_NZCV))
-#define UC32_EXCP_PRIV (ASR_MODE_PRIV)
-#define UC32_EXCP_TRAP (ASR_MODE_TRAP)
+#define UC32_EXCP_PRIV (1)
+#define UC32_EXCP_ITRAP (2)
+#define UC32_EXCP_DTRAP (3)
+#define UC32_EXCP_INTR (4)
/* Return the current ASR value. */
target_ulong cpu_asr_read(CPUUniCore32State *env1);
@@ -120,10 +122,6 @@ void cpu_asr_write(CPUUniCore32State *env1, target_ulong
val, target_ulong mask)
#define UC32_HWCAP_CMOV 4 /* 1 << 2 */
#define UC32_HWCAP_UCF64 8 /* 1 << 3 */
-#define UC32_CPUID(env) (env->cp0.c0_cpuid)
-#define UC32_CPUID_UCV2 0x40010863
-#define UC32_CPUID_ANY 0xffffffff
-
#define cpu_init uc32_cpu_init
#define cpu_exec uc32_cpu_exec
#define cpu_signal_handler uc32_cpu_signal_handler
--
1.7.0.4