[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH] hw/cadence_gem: Make rx_desc_addr and tx_desc_a
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH] hw/cadence_gem: Make rx_desc_addr and tx_desc_addr uint32_t |
Date: |
Tue, 19 Jun 2012 16:12:41 +0100 |
Peter C: ping? I was hoping for a review or ack for this
one before I stick it into an arm-devs pullreq.
thanks
-- PMM
On 22 May 2012 18:02, Peter Maydell <address@hidden> wrote:
> Make the state fields rx_desc_addr and tx_desc_addr uint32_t;
> this matches the VMStateDescription, and also conforms to how
> hardware works: the registers don't magically become larger
> if the device is attached to a CPU with a larger physical
> address size. It also fixes a compile failure if the
> target_phys_addr_t type is changed to 64 bits.
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> I'm going through fixing problems with moving target-arm to
> a larger physical address width so we can support the A15
> Large Physical Address Extensions...
>
> hw/cadence_gem.c | 4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/cadence_gem.c b/hw/cadence_gem.c
> index e2140ae..e563409 100644
> --- a/hw/cadence_gem.c
> +++ b/hw/cadence_gem.c
> @@ -339,8 +339,8 @@ typedef struct {
> uint8_t phy_loop; /* Are we in phy loopback? */
>
> /* The current DMA descriptor pointers */
> - target_phys_addr_t rx_desc_addr;
> - target_phys_addr_t tx_desc_addr;
> + uint32_t rx_desc_addr;
> + uint32_t tx_desc_addr;
>
> } GemState;
>
> --
> 1.7.1
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- Re: [Qemu-devel] [PATCH] hw/cadence_gem: Make rx_desc_addr and tx_desc_addr uint32_t,
Peter Maydell <=