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[Qemu-devel] [PATCH 07/33] target-arm: Add register_cp_regs_for_features
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 07/33] target-arm: Add register_cp_regs_for_features() |
Date: |
Wed, 20 Jun 2012 13:26:55 +0100 |
Add new function register_cp_regs_for_features() as a place to
register coprocessor registers dependent on feature flags.
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/cpu-qom.h | 1 +
target-arm/cpu.c | 2 ++
target-arm/helper.c | 11 +++++++++++
3 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index 848ac2f..4ccfc89 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -107,5 +107,6 @@ static inline ARMCPU *arm_env_get_cpu(CPUARMState *env)
#define ENV_GET_CPU(e) CPU(arm_env_get_cpu(e))
void arm_cpu_realize(ARMCPU *cpu);
+void register_cp_regs_for_features(ARMCPU *cpu);
#endif
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 6456a3d..1aff266 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -216,6 +216,8 @@ void arm_cpu_realize(ARMCPU *cpu)
if (arm_feature(env, ARM_FEATURE_VFP3)) {
set_feature(env, ARM_FEATURE_VFP);
}
+
+ register_cp_regs_for_features(cpu);
}
/* CPU models */
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 57bb78b..f7c9a3a 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -56,6 +56,17 @@ static int vfp_gdb_set_reg(CPUARMState *env, uint8_t *buf,
int reg)
return 0;
}
+void register_cp_regs_for_features(ARMCPU *cpu)
+{
+ /* Register all the coprocessor registers based on feature bits */
+ CPUARMState *env = &cpu->env;
+ if (arm_feature(env, ARM_FEATURE_M)) {
+ /* M profile has no coprocessor registers */
+ return;
+ }
+
+}
+
ARMCPU *cpu_arm_init(const char *cpu_model)
{
ARMCPU *cpu;
--
1.7.1
- [Qemu-devel] [PATCH 16/33] target-arm: Convert cp15 crn=2 registers, (continued)
- [Qemu-devel] [PATCH 16/33] target-arm: Convert cp15 crn=2 registers, Peter Maydell, 2012/06/20
- [Qemu-devel] [PATCH 19/33] target-arm: Convert cp15 crn=15 registers, Peter Maydell, 2012/06/20
- [Qemu-devel] [PATCH 04/33] hw/pxa2xx.c: Convert CLKCFG and PWRMODE cp14 regs, Peter Maydell, 2012/06/20
- [Qemu-devel] [PATCH 20/33] target-arm: Convert cp15 MMU TLB control, Peter Maydell, 2012/06/20
- [Qemu-devel] [PATCH 25/33] target-arm: Convert cp15 crn=1 registers, Peter Maydell, 2012/06/20
- [Qemu-devel] [PATCH 06/33] target-arm: Remove old cpu_arm_set_cp_io infrastructure, Peter Maydell, 2012/06/20
- [Qemu-devel] [PATCH 29/33] target-arm: Convert final ID registers, Peter Maydell, 2012/06/20
- [Qemu-devel] [PATCH 15/33] target-arm: Convert MMU fault status cp15 registers, Peter Maydell, 2012/06/20
- [Qemu-devel] [PATCH 12/33] target-arm: Convert performance monitor registers, Peter Maydell, 2012/06/20
- [Qemu-devel] [PATCH 11/33] target-arm: Convert TLS registers, Peter Maydell, 2012/06/20
- [Qemu-devel] [PATCH 07/33] target-arm: Add register_cp_regs_for_features(),
Peter Maydell <=
- [Qemu-devel] [PATCH 01/33] target-arm: Fix 11MPCore cache type register value, Peter Maydell, 2012/06/20
- [Qemu-devel] [PATCH 18/33] target-arm: Convert cp15 crn=10 registers, Peter Maydell, 2012/06/20
- [Qemu-devel] [PATCH 21/33] target-arm: Convert cp15 VA-PA translation registers, Peter Maydell, 2012/06/20
- [Qemu-devel] [PATCH 24/33] target-arm: Convert cp15 crn=9 registers, Peter Maydell, 2012/06/20
- [Qemu-devel] [PATCH 23/33] target-arm: Convert cp15 crn=6 registers, Peter Maydell, 2012/06/20
- [Qemu-devel] [PATCH 27/33] target-arm: Convert cp15 cache ID registers, Peter Maydell, 2012/06/20
- [Qemu-devel] [PATCH 05/33] hw/pxa2xx_pic: Convert coprocessor registers to new scheme, Peter Maydell, 2012/06/20
- [Qemu-devel] [PATCH 17/33] target-arm: Convert cp15 crn=13 registers, Peter Maydell, 2012/06/20
- [Qemu-devel] [PATCH 33/33] target-arm: Remove ARM_CPUID_* macros, Peter Maydell, 2012/06/20
- Re: [Qemu-devel] [PULL 00/33] target-arm queue, Blue Swirl, 2012/06/24