[Qemu-devel] [PATCH 10/15] memory: change tcg related code to using PhysMap

[Liu Ping Fan]

From: Liu Ping Fan <address@hidden>

Change tcg code to use PhysMap.
This is separated from the prev patch for review purpose. Should be
merged into prev one.

Signed-off-by: Liu Ping Fan <address@hidden>
---
 exec.c |   27 +++++++++++++++++++++------
 1 files changed, 21 insertions(+), 6 deletions(-)

diff --git a/exec.c b/exec.c
index 97addb9..8d0dea5 100644
--- a/exec.c
+++ b/exec.c
@@ -1923,6 +1923,7 @@ target_phys_addr_t 
memory_region_section_get_iotlb(CPUArchState *env,
 {
     target_phys_addr_t iotlb;
     CPUWatchpoint *wp;
+    PhysMap *map = cur_map_get();
 
     if (memory_region_is_ram(section->mr)) {
         /* Normal RAM.  */
@@ -1940,7 +1941,7 @@ target_phys_addr_t 
memory_region_section_get_iotlb(CPUArchState *env,
            and avoid full address decoding in every device.
            We can't use the high bits of pd for this because
            IO_MEM_ROMD uses these as a ram address.  */
-        iotlb = section - phys_sections;
+        iotlb = section - map->phys_sections;
         iotlb += memory_region_section_addr(section, paddr);
     }
 
@@ -1956,6 +1957,7 @@ target_phys_addr_t 
memory_region_section_get_iotlb(CPUArchState *env,
             }
         }
     }
+    physmap_put(map);
 
     return iotlb;
 }
@@ -3185,7 +3187,12 @@ static uint16_t dummy_section(PhysMap *map, MemoryRegion 
*mr)
 
 MemoryRegion *iotlb_to_region(target_phys_addr_t index)
 {
-    return phys_sections[index & ~TARGET_PAGE_MASK].mr;
+    MemoryRegion *ret;
+    PhysMap *map = cur_map_get();
+
+    ret = map->phys_sections[index & ~TARGET_PAGE_MASK].mr;
+    physmap_put(map);
+    return ret;
 }
 
 static void io_mem_init(void)
@@ -3946,13 +3953,14 @@ void stl_phys_notdirty(target_phys_addr_t addr, 
uint32_t val)
 {
     uint8_t *ptr;
     MemoryRegionSection *section;
+    PhysMap *map = cur_map_get();
 
     section = phys_page_find(addr >> TARGET_PAGE_BITS);
 
     if (!memory_region_is_ram(section->mr) || section->readonly) {
         addr = memory_region_section_addr(section, addr);
         if (memory_region_is_ram(section->mr)) {
-            section = &phys_sections[phys_section_rom];
+            section = &map->phys_sections[phys_section_rom];
         }
         io_mem_write(section->mr, addr, val, 4);
     } else {
@@ -3972,19 +3980,21 @@ void stl_phys_notdirty(target_phys_addr_t addr, 
uint32_t val)
             }
         }
     }
+    physmap_put(map);
 }
 
 void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val)
 {
     uint8_t *ptr;
     MemoryRegionSection *section;
+    PhysMap *map = cur_map_get();
 
     section = phys_page_find(addr >> TARGET_PAGE_BITS);
 
     if (!memory_region_is_ram(section->mr) || section->readonly) {
         addr = memory_region_section_addr(section, addr);
         if (memory_region_is_ram(section->mr)) {
-            section = &phys_sections[phys_section_rom];
+            section = &map->phys_sections[phys_section_rom];
         }
 #ifdef TARGET_WORDS_BIGENDIAN
         io_mem_write(section->mr, addr, val >> 32, 4);
@@ -3999,6 +4009,7 @@ void stq_phys_notdirty(target_phys_addr_t addr, uint64_t 
val)
                                + memory_region_section_addr(section, addr));
         stq_p(ptr, val);
     }
+    physmap_put(map);
 }
 
 /* warning: addr must be aligned */
@@ -4008,12 +4019,13 @@ static inline void stl_phys_internal(target_phys_addr_t 
addr, uint32_t val,
     uint8_t *ptr;
     MemoryRegionSection *section;
 
+    PhysMap *map = cur_map_get();
     section = phys_page_find(addr >> TARGET_PAGE_BITS);
 
     if (!memory_region_is_ram(section->mr) || section->readonly) {
         addr = memory_region_section_addr(section, addr);
         if (memory_region_is_ram(section->mr)) {
-            section = &phys_sections[phys_section_rom];
+            section = &map->phys_sections[phys_section_rom];
         }
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian == DEVICE_LITTLE_ENDIAN) {
@@ -4050,6 +4062,7 @@ static inline void stl_phys_internal(target_phys_addr_t 
addr, uint32_t val,
                 (0xff & ~CODE_DIRTY_FLAG));
         }
     }
+    physmap_put(map);
 }
 
 void stl_phys(target_phys_addr_t addr, uint32_t val)
@@ -4081,12 +4094,13 @@ static inline void stw_phys_internal(target_phys_addr_t 
addr, uint32_t val,
     uint8_t *ptr;
     MemoryRegionSection *section;
 
+    PhysMap *map = cur_map_get();
     section = phys_page_find(addr >> TARGET_PAGE_BITS);
 
     if (!memory_region_is_ram(section->mr) || section->readonly) {
         addr = memory_region_section_addr(section, addr);
         if (memory_region_is_ram(section->mr)) {
-            section = &phys_sections[phys_section_rom];
+            section = &map->phys_sections[phys_section_rom];
         }
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian == DEVICE_LITTLE_ENDIAN) {
@@ -4123,6 +4137,7 @@ static inline void stw_phys_internal(target_phys_addr_t 
addr, uint32_t val,
                 (0xff & ~CODE_DIRTY_FLAG));
         }
     }
+    physmap_put(map);
 }
 
 void stw_phys(target_phys_addr_t addr, uint32_t val)
-- 
1.7.4.4