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Re: [Qemu-devel] [PATCH 18/21] target-cris: switch to AREG0 free mode
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From: |
Blue Swirl |
|
Subject: |
Re: [Qemu-devel] [PATCH 18/21] target-cris: switch to AREG0 free mode |
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Date: |
Sat, 8 Sep 2012 08:35:18 +0000 |
On Fri, Sep 7, 2012 at 2:18 PM, Aurelien Jarno <address@hidden> wrote:
> On Sun, Sep 02, 2012 at 05:33:47PM +0000, Blue Swirl wrote:
>> Add an explicit CPUState parameter instead of relying on AREG0
>> and switch to AREG0 free mode.
>>
>> Signed-off-by: Blue Swirl <address@hidden>
>> ---
>> configure | 2 +-
>> target-cris/Makefile.objs | 2 -
>> target-cris/helper.c | 4 +-
>> target-cris/helper.h | 34 ++++++++--------
>> target-cris/op_helper.c | 89
>> +++++++++++++++++++++----------------------
>> target-cris/translate.c | 50 ++++++++++++-----------
>> target-cris/translate_v10.c | 22 +++++-----
>> 7 files changed, 101 insertions(+), 102 deletions(-)
>>
>> diff --git a/configure b/configure
>> index e464d2f..d760e07 100755
>> --- a/configure
>> +++ b/configure
>> @@ -3829,7 +3829,7 @@ symlink "$source_path/Makefile.target"
>> "$target_dir/Makefile"
>>
>>
>> case "$target_arch2" in
>> - alpha | arm* | i386 | lm32 | m68k | microblaze* | or32 | s390x | sparc* |
>> unicore32 | x86_64 | xtensa* | ppc*)
>> + alpha | arm* | cris | i386 | lm32 | m68k | microblaze* | or32 | s390x |
>> sparc* | unicore32 | x86_64 | xtensa* | ppc*)
>> echo "CONFIG_TCG_PASS_AREG0=y" >> $config_target_mak
>> ;;
>> esac
>> diff --git a/target-cris/Makefile.objs b/target-cris/Makefile.objs
>> index 4b09e8c..afb87bc 100644
>> --- a/target-cris/Makefile.objs
>> +++ b/target-cris/Makefile.objs
>> @@ -1,4 +1,2 @@
>> obj-y += translate.o op_helper.o helper.o cpu.o
>> obj-$(CONFIG_SOFTMMU) += mmu.o machine.o
>> -
>> -$(obj)/op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
>> diff --git a/target-cris/helper.c b/target-cris/helper.c
>> index bfbc29e..1bdb7e2 100644
>> --- a/target-cris/helper.c
>> +++ b/target-cris/helper.c
>> @@ -151,7 +151,7 @@ static void do_interruptv10(CPUCRISState *env)
>> }
>>
>> /* Now that we are in kernel mode, load the handlers address. */
>> - env->pc = ldl_code(env->pregs[PR_EBP] + ex_vec * 4);
>> + env->pc = cpu_ldl_code(env, env->pregs[PR_EBP] + ex_vec * 4);
>> env->locked_irq = 1;
>> env->pregs[PR_CCS] |= F_FLAG_V10; /* set F. */
>>
>> @@ -233,7 +233,7 @@ void do_interrupt(CPUCRISState *env)
>> /* Now that we are in kernel mode, load the handlers address.
>> This load may not fault, real hw leaves that behaviour as
>> undefined. */
>> - env->pc = ldl_code(env->pregs[PR_EBP] + ex_vec * 4);
>> + env->pc = cpu_ldl_code(env, env->pregs[PR_EBP] + ex_vec * 4);
>>
>> /* Clear the excption_index to avoid spurios hw_aborts for recursive
>> bus faults. */
>> diff --git a/target-cris/helper.h b/target-cris/helper.h
>> index 093063a..b575524 100644
>> --- a/target-cris/helper.h
>> +++ b/target-cris/helper.h
>> @@ -1,26 +1,26 @@
>> #include "def-helper.h"
>>
>> -DEF_HELPER_1(raise_exception, void, i32)
>> -DEF_HELPER_1(tlb_flush_pid, void, i32)
>> -DEF_HELPER_1(spc_write, void, i32)
>> +DEF_HELPER_2(raise_exception, void, env, i32)
>> +DEF_HELPER_2(tlb_flush_pid, void, env, i32)
>> +DEF_HELPER_2(spc_write, void, env, i32)
>> DEF_HELPER_3(dump, void, i32, i32, i32)
>> -DEF_HELPER_0(rfe, void);
>> -DEF_HELPER_0(rfn, void);
>> +DEF_HELPER_1(rfe, void, env);
>> +DEF_HELPER_1(rfn, void, env);
>>
>> -DEF_HELPER_2(movl_sreg_reg, void, i32, i32)
>> -DEF_HELPER_2(movl_reg_sreg, void, i32, i32)
>> +DEF_HELPER_3(movl_sreg_reg, void, env, i32, i32)
>> +DEF_HELPER_3(movl_reg_sreg, void, env, i32, i32)
>>
>> DEF_HELPER_FLAGS_1(lz, TCG_CALL_PURE, i32, i32);
>> -DEF_HELPER_FLAGS_3(btst, TCG_CALL_PURE, i32, i32, i32, i32);
>> +DEF_HELPER_FLAGS_4(btst, TCG_CALL_PURE, i32, env, i32, i32, i32);
>>
>> -DEF_HELPER_FLAGS_3(evaluate_flags_muls, TCG_CALL_PURE, i32, i32, i32, i32)
>> -DEF_HELPER_FLAGS_3(evaluate_flags_mulu, TCG_CALL_PURE, i32, i32, i32, i32)
>> -DEF_HELPER_FLAGS_4(evaluate_flags_mcp, TCG_CALL_PURE, i32, i32, i32, i32,
>> i32)
>> -DEF_HELPER_FLAGS_4(evaluate_flags_alu_4, TCG_CALL_PURE, i32, i32, i32, i32,
>> i32)
>> -DEF_HELPER_FLAGS_4(evaluate_flags_sub_4, TCG_CALL_PURE, i32, i32, i32, i32,
>> i32)
>> -DEF_HELPER_FLAGS_2(evaluate_flags_move_4, TCG_CALL_PURE, i32, i32, i32)
>> -DEF_HELPER_FLAGS_2(evaluate_flags_move_2, TCG_CALL_PURE, i32, i32, i32)
>> -DEF_HELPER_0(evaluate_flags, void)
>> -DEF_HELPER_0(top_evaluate_flags, void)
>> +DEF_HELPER_FLAGS_4(evaluate_flags_muls, TCG_CALL_PURE, i32, env, i32, i32,
>> i32)
>> +DEF_HELPER_FLAGS_4(evaluate_flags_mulu, TCG_CALL_PURE, i32, env, i32, i32,
>> i32)
>> +DEF_HELPER_FLAGS_5(evaluate_flags_mcp, TCG_CALL_PURE, i32, env, i32, i32,
>> i32, i32)
>> +DEF_HELPER_FLAGS_5(evaluate_flags_alu_4, TCG_CALL_PURE, i32, env, i32, i32,
>> i32, i32)
>> +DEF_HELPER_FLAGS_5(evaluate_flags_sub_4, TCG_CALL_PURE, i32, env, i32, i32,
>> i32, i32)
>> +DEF_HELPER_FLAGS_3(evaluate_flags_move_4, TCG_CALL_PURE, i32, env, i32, i32)
>> +DEF_HELPER_FLAGS_3(evaluate_flags_move_2, TCG_CALL_PURE, i32, env, i32, i32)
>> +DEF_HELPER_1(evaluate_flags, void, env)
>> +DEF_HELPER_1(top_evaluate_flags, void, env)
>>
>> #include "def-helper.h"
>> diff --git a/target-cris/op_helper.c b/target-cris/op_helper.c
>> index ac7c98c..5cce3e7 100644
>> --- a/target-cris/op_helper.c
>> +++ b/target-cris/op_helper.c
>> @@ -19,7 +19,6 @@
>> */
>>
>> #include "cpu.h"
>> -#include "dyngen-exec.h"
>> #include "mmu.h"
>> #include "helper.h"
>> #include "host-utils.h"
>> @@ -55,17 +54,12 @@
>> /* Try to fill the TLB and return an exception if error. If retaddr is
>> NULL, it means that the function was called in C code (i.e. not
>> from generated code or from helper.c) */
>> -/* XXX: fix it to restore all registers */
>> -void tlb_fill(CPUCRISState *env1, target_ulong addr, int is_write, int
>> mmu_idx,
>> +void tlb_fill(CPUCRISState *env, target_ulong addr, int is_write, int
>> mmu_idx,
>> uintptr_t retaddr)
>> {
>> TranslationBlock *tb;
>> - CPUCRISState *saved_env;
>> int ret;
>>
>> - saved_env = env;
>> - env = env1;
>> -
>> D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__,
>> env->pc, env->debug1, (void *)retaddr);
>> ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx);
>> @@ -79,23 +73,22 @@ void tlb_fill(CPUCRISState *env1, target_ulong addr, int
>> is_write, int mmu_idx,
>> cpu_restore_state(tb, env, retaddr);
>>
>> /* Evaluate flags after retranslation. */
>> - helper_top_evaluate_flags();
>> + helper_top_evaluate_flags(env);
>> }
>> }
>> cpu_loop_exit(env);
>> }
>> - env = saved_env;
>> }
>>
>> #endif
>>
>> -void helper_raise_exception(uint32_t index)
>> +void helper_raise_exception(CPUCRISState *env, uint32_t index)
>> {
>> env->exception_index = index;
>> cpu_loop_exit(env);
>> }
>>
>> -void helper_tlb_flush_pid(uint32_t pid)
>> +void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid)
>> {
>> #if !defined(CONFIG_USER_ONLY)
>> pid &= 0xff;
>> @@ -104,7 +97,7 @@ void helper_tlb_flush_pid(uint32_t pid)
>> #endif
>> }
>>
>> -void helper_spc_write(uint32_t new_spc)
>> +void helper_spc_write(CPUCRISState *env, uint32_t new_spc)
>> {
>> #if !defined(CONFIG_USER_ONLY)
>> tlb_flush_page(env, env->pregs[PR_SPC]);
>> @@ -121,7 +114,7 @@ void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2)
>> #define EXTRACT_FIELD(src, start, end) \
>> (((src) >> start) & ((1 << (end - start + 1)) - 1))
>>
>> -void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg)
>> +void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
>> {
>> uint32_t srs;
>> srs = env->pregs[PR_SRS];
>> @@ -171,7 +164,7 @@ void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg)
>> #endif
>> }
>>
>> -void helper_movl_reg_sreg (uint32_t reg, uint32_t sreg)
>> +void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg)
>> {
>> uint32_t srs;
>> env->pregs[PR_SRS] &= 3;
>> @@ -216,7 +209,7 @@ static void cris_ccs_rshift(CPUCRISState *env)
>> env->pregs[PR_CCS] = ccs;
>> }
>>
>> -void helper_rfe(void)
>> +void helper_rfe(CPUCRISState *env)
>> {
>> int rflag = env->pregs[PR_CCS] & R_FLAG;
>>
>> @@ -232,7 +225,7 @@ void helper_rfe(void)
>> env->pregs[PR_CCS] |= P_FLAG;
>> }
>>
>> -void helper_rfn(void)
>> +void helper_rfn(CPUCRISState *env)
>> {
>> int rflag = env->pregs[PR_CCS] & R_FLAG;
>>
>> @@ -256,7 +249,7 @@ uint32_t helper_lz(uint32_t t0)
>> return clz32(t0);
>> }
>>
>> -uint32_t helper_btst(uint32_t t0, uint32_t t1, uint32_t ccs)
>> +uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t
>> ccs)
>> {
>> /* FIXME: clean this up. */
>>
>> @@ -284,7 +277,8 @@ uint32_t helper_btst(uint32_t t0, uint32_t t1, uint32_t
>> ccs)
>> return ccs;
>> }
>>
>> -static inline uint32_t evaluate_flags_writeback(uint32_t flags, uint32_t
>> ccs)
>> +static inline uint32_t evaluate_flags_writeback(CPUCRISState *env,
>> + uint32_t flags, uint32_t
>> ccs)
>> {
>> unsigned int x, z, mask;
>>
>> @@ -303,7 +297,8 @@ static inline uint32_t evaluate_flags_writeback(uint32_t
>> flags, uint32_t ccs)
>> return ccs;
>> }
>>
>> -uint32_t helper_evaluate_flags_muls(uint32_t ccs, uint32_t res, uint32_t
>> mof)
>> +uint32_t helper_evaluate_flags_muls(CPUCRISState *env, uint32_t ccs,
>> + uint32_t res, uint32_t mof)
>> {
>> uint32_t flags = 0;
>> int64_t tmp;
>> @@ -321,10 +316,11 @@ uint32_t helper_evaluate_flags_muls(uint32_t ccs,
>> uint32_t res, uint32_t mof)
>> if ((dneg && mof != -1)
>> || (!dneg && mof != 0))
>> flags |= V_FLAG;
>> - return evaluate_flags_writeback(flags, ccs);
>> + return evaluate_flags_writeback(env, flags, ccs);
>> }
>>
>> -uint32_t helper_evaluate_flags_mulu(uint32_t ccs, uint32_t res, uint32_t
>> mof)
>> +uint32_t helper_evaluate_flags_mulu(CPUCRISState *env, uint32_t ccs,
>> + uint32_t res, uint32_t mof)
>> {
>> uint32_t flags = 0;
>> uint64_t tmp;
>> @@ -339,10 +335,10 @@ uint32_t helper_evaluate_flags_mulu(uint32_t ccs,
>> uint32_t res, uint32_t mof)
>> if (mof)
>> flags |= V_FLAG;
>>
>> - return evaluate_flags_writeback(flags, ccs);
>> + return evaluate_flags_writeback(env, flags, ccs);
>> }
>>
>> -uint32_t helper_evaluate_flags_mcp(uint32_t ccs,
>> +uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs,
>> uint32_t src, uint32_t dst, uint32_t res)
>> {
>> uint32_t flags = 0;
>> @@ -368,10 +364,10 @@ uint32_t helper_evaluate_flags_mcp(uint32_t ccs,
>> flags |= R_FLAG;
>> }
>>
>> - return evaluate_flags_writeback(flags, ccs);
>> + return evaluate_flags_writeback(env, flags, ccs);
>> }
>>
>> -uint32_t helper_evaluate_flags_alu_4(uint32_t ccs,
>> +uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs,
>> uint32_t src, uint32_t dst, uint32_t res)
>> {
>> uint32_t flags = 0;
>> @@ -397,10 +393,10 @@ uint32_t helper_evaluate_flags_alu_4(uint32_t ccs,
>> flags |= C_FLAG;
>> }
>>
>> - return evaluate_flags_writeback(flags, ccs);
>> + return evaluate_flags_writeback(env, flags, ccs);
>> }
>>
>> -uint32_t helper_evaluate_flags_sub_4(uint32_t ccs,
>> +uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs,
>> uint32_t src, uint32_t dst, uint32_t res)
>> {
>> uint32_t flags = 0;
>> @@ -427,10 +423,11 @@ uint32_t helper_evaluate_flags_sub_4(uint32_t ccs,
>> }
>>
>> flags ^= C_FLAG;
>> - return evaluate_flags_writeback(flags, ccs);
>> + return evaluate_flags_writeback(env, flags, ccs);
>> }
>>
>> -uint32_t helper_evaluate_flags_move_4(uint32_t ccs, uint32_t res)
>> +uint32_t helper_evaluate_flags_move_4(CPUCRISState *env, uint32_t ccs,
>> + uint32_t res)
>> {
>> uint32_t flags = 0;
>>
>> @@ -439,9 +436,10 @@ uint32_t helper_evaluate_flags_move_4(uint32_t ccs,
>> uint32_t res)
>> else if (res == 0L)
>> flags |= Z_FLAG;
>>
>> - return evaluate_flags_writeback(flags, ccs);
>> + return evaluate_flags_writeback(env, flags, ccs);
>> }
>> -uint32_t helper_evaluate_flags_move_2(uint32_t ccs, uint32_t res)
>> +uint32_t helper_evaluate_flags_move_2(CPUCRISState *env, uint32_t ccs,
>> + uint32_t res)
>> {
>> uint32_t flags = 0;
>>
>> @@ -450,12 +448,12 @@ uint32_t helper_evaluate_flags_move_2(uint32_t ccs,
>> uint32_t res)
>> else if (res == 0)
>> flags |= Z_FLAG;
>>
>> - return evaluate_flags_writeback(flags, ccs);
>> + return evaluate_flags_writeback(env, flags, ccs);
>> }
>>
>> /* TODO: This is expensive. We could split things up and only evaluate part
>> of
>> CCR on a need to know basis. For now, we simply re-evaluate everything.
>> */
>> -void helper_evaluate_flags(void)
>> +void helper_evaluate_flags(CPUCRISState *env)
>> {
>> uint32_t src, dst, res;
>> uint32_t flags = 0;
>> @@ -571,25 +569,26 @@ void helper_evaluate_flags(void)
>> if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
>> flags ^= C_FLAG;
>>
>> - env->pregs[PR_CCS] = evaluate_flags_writeback(flags,
>> env->pregs[PR_CCS]);
>> + env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags,
>> + env->pregs[PR_CCS]);
>> }
>>
>> -void helper_top_evaluate_flags(void)
>> +void helper_top_evaluate_flags(CPUCRISState *env)
>> {
>> switch (env->cc_op)
>> {
>> case CC_OP_MCP:
>> - env->pregs[PR_CCS] = helper_evaluate_flags_mcp(
>> + env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env,
>> env->pregs[PR_CCS], env->cc_src,
>> env->cc_dest, env->cc_result);
>> break;
>> case CC_OP_MULS:
>> - env->pregs[PR_CCS] = helper_evaluate_flags_muls(
>> + env->pregs[PR_CCS] = helper_evaluate_flags_muls(env,
>> env->pregs[PR_CCS], env->cc_result,
>> env->pregs[PR_MOF]);
>> break;
>> case CC_OP_MULU:
>> - env->pregs[PR_CCS] = helper_evaluate_flags_mulu(
>> + env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env,
>> env->pregs[PR_CCS], env->cc_result,
>> env->pregs[PR_MOF]);
>> break;
>> @@ -604,18 +603,18 @@ void helper_top_evaluate_flags(void)
>> {
>> case 4:
>> env->pregs[PR_CCS] =
>> - helper_evaluate_flags_move_4(
>> + helper_evaluate_flags_move_4(env,
>> env->pregs[PR_CCS],
>> env->cc_result);
>> break;
>> case 2:
>> env->pregs[PR_CCS] =
>> - helper_evaluate_flags_move_2(
>> + helper_evaluate_flags_move_2(env,
>> env->pregs[PR_CCS],
>> env->cc_result);
>> break;
>> default:
>> - helper_evaluate_flags();
>> + helper_evaluate_flags(env);
>> break;
>> }
>> break;
>> @@ -626,12 +625,12 @@ void helper_top_evaluate_flags(void)
>> case CC_OP_CMP:
>> if (env->cc_size == 4)
>> env->pregs[PR_CCS] =
>> - helper_evaluate_flags_sub_4(
>> + helper_evaluate_flags_sub_4(env,
>> env->pregs[PR_CCS],
>> env->cc_src, env->cc_dest,
>> env->cc_result);
>> else
>> - helper_evaluate_flags();
>> + helper_evaluate_flags(env);
>> break;
>> default:
>> {
>> @@ -639,13 +638,13 @@ void helper_top_evaluate_flags(void)
>> {
>> case 4:
>> env->pregs[PR_CCS] =
>> - helper_evaluate_flags_alu_4(
>> + helper_evaluate_flags_alu_4(env,
>> env->pregs[PR_CCS],
>> env->cc_src, env->cc_dest,
>> env->cc_result);
>> break;
>> default:
>> - helper_evaluate_flags();
>> + helper_evaluate_flags(env);
>> break;
>> }
>> }
>> diff --git a/target-cris/translate.c b/target-cris/translate.c
>> index 1ad9ec7..5e4f7f5 100644
>> --- a/target-cris/translate.c
>> +++ b/target-cris/translate.c
>> @@ -211,9 +211,9 @@ static inline void t_gen_mov_preg_TN(DisasContext *dc,
>> int r, TCGv tn)
>> tcg_gen_andi_tl(cpu_PR[r], tn, 3);
>> else {
>> if (r == PR_PID)
>> - gen_helper_tlb_flush_pid(tn);
>> + gen_helper_tlb_flush_pid(cpu_env, tn);
>> if (dc->tb_flags & S_FLAG && r == PR_SPC)
>> - gen_helper_spc_write(tn);
>> + gen_helper_spc_write(cpu_env, tn);
>> else if (r == PR_CCS)
>> dc->cpustate_changed = 1;
>> tcg_gen_mov_tl(cpu_PR[r], tn);
>> @@ -241,24 +241,24 @@ static int cris_fetch(DisasContext *dc, uint32_t addr,
>> switch (size) {
>> case 4:
>> {
>> - r = ldl_code(addr);
>> + r = cpu_ldl_code(cpu_single_env, addr);
>> break;
>> }
>> case 2:
>> {
>> if (sign) {
>> - r = ldsw_code(addr);
>> + r = cpu_ldsw_code(cpu_single_env, addr);
>> } else {
>> - r = lduw_code(addr);
>> + r = cpu_lduw_code(cpu_single_env, addr);
>> }
>> break;
>> }
>> case 1:
>> {
>> if (sign) {
>> - r = ldsb_code(addr);
>> + r = cpu_ldsb_code(cpu_single_env, addr);
>> } else {
>> - r = ldub_code(addr);
>> + r = cpu_ldub_code(cpu_single_env, addr);
>> }
>> break;
>> }
>> @@ -278,7 +278,7 @@ static void cris_lock_irq(DisasContext *dc)
>> static inline void t_gen_raise_exception(uint32_t index)
>> {
>> TCGv_i32 tmp = tcg_const_i32(index);
>> - gen_helper_raise_exception(tmp);
>> + gen_helper_raise_exception(cpu_env, tmp);
>> tcg_temp_free_i32(tmp);
>> }
>>
>> @@ -624,17 +624,17 @@ static void cris_evaluate_flags(DisasContext *dc)
>> switch (dc->cc_op)
>> {
>> case CC_OP_MCP:
>> - gen_helper_evaluate_flags_mcp(cpu_PR[PR_CCS],
>> + gen_helper_evaluate_flags_mcp(cpu_PR[PR_CCS], cpu_env,
>> cpu_PR[PR_CCS], cc_src,
>> cc_dest, cc_result);
>> break;
>> case CC_OP_MULS:
>> - gen_helper_evaluate_flags_muls(cpu_PR[PR_CCS],
>> + gen_helper_evaluate_flags_muls(cpu_PR[PR_CCS], cpu_env,
>> cpu_PR[PR_CCS], cc_result,
>> cpu_PR[PR_MOF]);
>> break;
>> case CC_OP_MULU:
>> - gen_helper_evaluate_flags_mulu(cpu_PR[PR_CCS],
>> + gen_helper_evaluate_flags_mulu(cpu_PR[PR_CCS], cpu_env,
>> cpu_PR[PR_CCS], cc_result,
>> cpu_PR[PR_MOF]);
>> break;
>> @@ -648,15 +648,15 @@ static void cris_evaluate_flags(DisasContext *dc)
>> switch (dc->cc_size)
>> {
>> case 4:
>> - gen_helper_evaluate_flags_move_4(cpu_PR[PR_CCS],
>> + gen_helper_evaluate_flags_move_4(cpu_PR[PR_CCS],
>> cpu_env,
>> cpu_PR[PR_CCS], cc_result);
>> break;
>> case 2:
>> - gen_helper_evaluate_flags_move_2(cpu_PR[PR_CCS],
>> + gen_helper_evaluate_flags_move_2(cpu_PR[PR_CCS],
>> cpu_env,
>> cpu_PR[PR_CCS], cc_result);
>> break;
>> default:
>> - gen_helper_evaluate_flags();
>> + gen_helper_evaluate_flags(cpu_env);
>> break;
>> }
>> break;
>> @@ -666,21 +666,21 @@ static void cris_evaluate_flags(DisasContext *dc)
>> case CC_OP_SUB:
>> case CC_OP_CMP:
>> if (dc->cc_size == 4)
>> - gen_helper_evaluate_flags_sub_4(cpu_PR[PR_CCS],
>> + gen_helper_evaluate_flags_sub_4(cpu_PR[PR_CCS],
>> cpu_env,
>> cpu_PR[PR_CCS], cc_src, cc_dest, cc_result);
>> else
>> - gen_helper_evaluate_flags();
>> + gen_helper_evaluate_flags(cpu_env);
>>
>> break;
>> default:
>> switch (dc->cc_size)
>> {
>> case 4:
>> - gen_helper_evaluate_flags_alu_4(cpu_PR[PR_CCS],
>> + gen_helper_evaluate_flags_alu_4(cpu_PR[PR_CCS],
>> cpu_env,
>> cpu_PR[PR_CCS], cc_src, cc_dest, cc_result);
>> break;
>> default:
>> - gen_helper_evaluate_flags();
>> + gen_helper_evaluate_flags(cpu_env);
>> break;
>> }
>> break;
>> @@ -1475,7 +1475,7 @@ static int dec_btstq(DisasContext *dc)
>>
>> cris_cc_mask(dc, CC_MASK_NZ);
>> cris_evaluate_flags(dc);
>> - gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->op2],
>> + gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->op2],
>> tcg_const_tl(dc->op1), cpu_PR[PR_CCS]);
>> cris_alu(dc, CC_OP_MOVE,
>> cpu_R[dc->op2], cpu_R[dc->op2], cpu_R[dc->op2], 4);
>> @@ -1925,7 +1925,7 @@ static int dec_btst_r(DisasContext *dc)
>> dc->op1, dc->op2);
>> cris_cc_mask(dc, CC_MASK_NZ);
>> cris_evaluate_flags(dc);
>> - gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->op2],
>> + gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->op2],
>> cpu_R[dc->op1], cpu_PR[PR_CCS]);
>> cris_alu(dc, CC_OP_MOVE, cpu_R[dc->op2],
>> cpu_R[dc->op2], cpu_R[dc->op2], 4);
>> @@ -2135,14 +2135,16 @@ static int dec_move_rs(DisasContext *dc)
>> {
>> LOG_DIS("move $r%u, $s%u\n", dc->op1, dc->op2);
>> cris_cc_mask(dc, 0);
>> - gen_helper_movl_sreg_reg(tcg_const_tl(dc->op2), tcg_const_tl(dc->op1));
>> + gen_helper_movl_sreg_reg(cpu_env, tcg_const_tl(dc->op2),
>> + tcg_const_tl(dc->op1));
>> return 2;
>> }
>> static int dec_move_sr(DisasContext *dc)
>> {
>> LOG_DIS("move $s%u, $r%u\n", dc->op2, dc->op1);
>> cris_cc_mask(dc, 0);
>> - gen_helper_movl_reg_sreg(tcg_const_tl(dc->op1), tcg_const_tl(dc->op2));
>> + gen_helper_movl_reg_sreg(cpu_env, tcg_const_tl(dc->op1),
>> + tcg_const_tl(dc->op2));
>> return 2;
>> }
>>
>> @@ -2906,14 +2908,14 @@ static int dec_rfe_etc(DisasContext *dc)
>> /* rfe. */
>> LOG_DIS("rfe\n");
>> cris_evaluate_flags(dc);
>> - gen_helper_rfe();
>> + gen_helper_rfe(cpu_env);
>> dc->is_jmp = DISAS_UPDATE;
>> break;
>> case 5:
>> /* rfn. */
>> LOG_DIS("rfn\n");
>> cris_evaluate_flags(dc);
>> - gen_helper_rfn();
>> + gen_helper_rfn(cpu_env);
>> dc->is_jmp = DISAS_UPDATE;
>> break;
>> case 6:
>> diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c
>> index 3629629..d9d6aa5 100644
>> --- a/target-cris/translate_v10.c
>> +++ b/target-cris/translate_v10.c
>> @@ -182,17 +182,17 @@ static int dec10_prep_move_m(DisasContext *dc, int
>> s_ext, int memsize,
>> if (memsize != 4) {
>> if (s_ext) {
>> if (memsize == 1)
>> - imm = ldsb_code(dc->pc + 2);
>> + imm = cpu_ldsb_code(cpu_single_env, dc->pc + 2);
>> else
>> - imm = ldsw_code(dc->pc + 2);
>> + imm = cpu_ldsw_code(cpu_single_env, dc->pc + 2);
>> } else {
>> if (memsize == 1)
>> - imm = ldub_code(dc->pc + 2);
>> + imm = cpu_ldub_code(cpu_single_env, dc->pc + 2);
>> else
>> - imm = lduw_code(dc->pc + 2);
>> + imm = cpu_lduw_code(cpu_single_env, dc->pc + 2);
>> }
>> } else
>> - imm = ldl_code(dc->pc + 2);
>> + imm = cpu_ldl_code(cpu_single_env, dc->pc + 2);
>>
>> tcg_gen_movi_tl(dst, imm);
>
> Similarly to what I reported for the microblaze and sh4 target, I think
> we should not start using cpu_single_env (a global variable) to replace
> env (a global variable stored in a register).
This task could be also taken to a different patch series, because the
conversions committed earlier also used cpu_single_env.
Eliminating cpu_single_env altogether may be possible but it would
need some refactoring.
>
> It is possible to pass env through the subroutine, though it is more
> complicated there than for other targets. I have therefore done the work
> and I have attached the two resulting patches to this mail.
Thank you for the work, the patches look better. I think the patches
should also include my sign-off.
>
>> @@ -289,7 +289,7 @@ static unsigned int dec10_quick_imm(DisasContext *dc)
>> } else {
>> /* BTST */
>> cris_update_cc_op(dc, CC_OP_FLAGS, 4);
>> - gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->dst],
>> + gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->dst],
>> tcg_const_tl(imm), cpu_PR[PR_CCS]);
>> }
>> break;
>> @@ -723,7 +723,7 @@ static unsigned int dec10_reg(DisasContext *dc)
>> LOG_DIS("btst $r%d, $r%d sz=%d\n", dc->src, dc->dst, size);
>> cris_cc_mask(dc, CC_MASK_NZVC);
>> cris_update_cc_op(dc, CC_OP_FLAGS, 4);
>> - gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->dst],
>> + gen_helper_btst(cpu_PR[PR_CCS], cpu_env, cpu_R[dc->dst],
>> cpu_R[dc->src], cpu_PR[PR_CCS]);
>> break;
>> case CRISV10_REG_DSTEP:
>> @@ -974,7 +974,7 @@ static int dec10_dip(DisasContext *dc)
>> LOG_DIS("dip pc=%x opcode=%d r%d r%d\n",
>> dc->pc, dc->opcode, dc->src, dc->dst);
>> if (dc->src == 15) {
>> - imm = ldl_code(dc->pc + 2);
>> + imm = cpu_ldl_code(cpu_single_env, dc->pc + 2);
>> tcg_gen_movi_tl(cpu_PR[PR_PREFIX], imm);
>> if (dc->postinc)
>> insn_len += 4;
>> @@ -1119,7 +1119,7 @@ static unsigned int dec10_ind(DisasContext *dc)
>> if (dc->src == 15) {
>> LOG_DIS("jump.%d %d r%d r%d direct\n", size,
>> dc->opcode, dc->src, dc->dst);
>> - imm = ldl_code(dc->pc + 2);
>> + imm = cpu_ldl_code(cpu_single_env, dc->pc + 2);
>> if (dc->mode == CRISV10_MODE_AUTOINC)
>> insn_len += size;
>>
>> @@ -1185,7 +1185,7 @@ static unsigned int dec10_ind(DisasContext *dc)
>> case CRISV10_IND_BCC_M:
>>
>> cris_cc_mask(dc, 0);
>> - imm = ldsw_code(dc->pc + 2);
>> + imm = cpu_ldsw_code(cpu_single_env, dc->pc + 2);
>> simm = (int16_t)imm;
>> simm += 4;
>>
>> @@ -1210,7 +1210,7 @@ static unsigned int crisv10_decoder(DisasContext *dc)
>> tcg_gen_debug_insn_start(dc->pc);
>>
>> /* Load a halfword onto the instruction register. */
>> - dc->ir = lduw_code(dc->pc);
>> + dc->ir = cpu_lduw_code(cpu_single_env, dc->pc);
>>
>> /* Now decode it. */
>> dc->opcode = EXTRACT_FIELD(dc->ir, 6, 9);
>> --
>> 1.7.2.5
>>
>>
>>
>
> --
> Aurelien Jarno GPG: 1024D/F1BCDB73
> address@hidden http://www.aurel32.net
- Re: [Qemu-devel] [PATCH 16/21] target-arm: switch to AREG0 free mode, (continued)
[Qemu-devel] [PATCH 19/21] target-sh4: switch to AREG0 free mode, Blue Swirl, 2012/09/02
[Qemu-devel] [PATCH 20/21] target-mips: switch to AREG0 free mode, Blue Swirl, 2012/09/02
[Qemu-devel] [PATCH 21/21] Remove unused CONFIG_TCG_PASS_AREG0 and dead code, Blue Swirl, 2012/09/02