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Re: [Qemu-devel] [PATCH v7 12/14] target-mips-ase-dsp: Add MIPS DSP proc
From: |
Aurelien Jarno |
Subject: |
Re: [Qemu-devel] [PATCH v7 12/14] target-mips-ase-dsp: Add MIPS DSP processors |
Date: |
Sat, 8 Sep 2012 14:06:30 +0200 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Sat, Sep 08, 2012 at 08:01:30PM +0800, Jia Liu wrote:
> Hi Aurelien,
>
> On Thu, Sep 6, 2012 at 5:11 PM, Aurelien Jarno <address@hidden> wrote:
> > On Tue, Aug 28, 2012 at 02:36:23PM +0800, Jia Liu wrote:
> >> Add MIPS[32|64] ASE DSP[R1|R2] generic cpu model for test.
> >>
> >> Signed-off-by: Jia Liu <address@hidden>
> >> ---
> >> target-mips/translate_init.c | 55
> >> ++++++++++++++++++++++++++++++++++++++++++
> >> 1 file changed, 55 insertions(+)
> >>
> >> diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c
> >> index c39138f..65ba547 100644
> >> --- a/target-mips/translate_init.c
> >> +++ b/target-mips/translate_init.c
> >> @@ -311,6 +311,32 @@ static const mips_def_t mips_defs[] =
> >> .insn_flags = CPU_MIPS32R2 | ASE_MIPS16 | ASE_DSP | ASE_MT,
> >> .mmu_type = MMU_TYPE_R4000,
> >> },
> >> + {
> >> + /* A generic CPU providing MIPS32 ASE DSP Release 2 features.
> >> + FIXME: Eventually this should be replaced by a real CPU model.
> >> */
> >
> > Is it something that could be fixed now? I guess MIPS produces core with
> > this instruction set.
> >
>
> I'll make it 74kf. Is it OK?
>
Yes, it looks fine to me.
--
Aurelien Jarno GPG: 1024D/F1BCDB73
address@hidden http://www.aurel32.net