[Qemu-devel] [PATCH 3/9] target-xtensa: specialize softfloat NaN rules

[Max Filippov]

NaN propagation rule: leftmost NaN in the expression gets propagated to
the result.

Signed-off-by: Max Filippov <address@hidden>
---
 fpu/softfloat-specialize.h |    9 +++++++--
 1 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
index 4902450..9d78f41 100644
--- a/fpu/softfloat-specialize.h
+++ b/fpu/softfloat-specialize.h
@@ -57,7 +57,8 @@ const float16 float16_default_nan = const_float16(0xFE00);
 *----------------------------------------------------------------------------*/
 #if defined(TARGET_SPARC)
 const float32 float32_default_nan = const_float32(0x7FFFFFFF);
-#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
+#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
+      defined(TARGET_XTENSA)
 const float32 float32_default_nan = const_float32(0x7FC00000);
 #elif SNAN_BIT_IS_ONE
 const float32 float32_default_nan = const_float32(0x7FBFFFFF);
@@ -262,9 +263,13 @@ float32 float32_maybe_silence_nan( float32 a_ )
 #    error Rules for silencing a signaling NaN are target-specific
 #  endif
 #else
+#  if defined(TARGET_XTENSA)
+        return a_;
+#  else
         uint32_t a = float32_val(a_);
         a |= (1 << 22);
         return make_float32(a);
+#  endif
 #endif
     }
     return a_;
@@ -372,7 +377,7 @@ static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag 
bIsQNaN, flag bIsSNaN,
         return 1;
     }
 }
-#elif defined(TARGET_PPC)
+#elif defined(TARGET_PPC) || defined(TARGET_XTENSA)
 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
                    flag aIsLargerSignificand)
 {
-- 
1.7.7.6