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Re: [Qemu-devel] [PATCH 1/5] softfloat: fix float{32, 64}_muladd options
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH 1/5] softfloat: fix float{32, 64}_muladd options |
Date: |
Sun, 9 Sep 2012 10:47:52 +0100 |
On 9 September 2012 10:24, Aurelien Jarno <address@hidden> wrote:
> On Sun, Sep 09, 2012 at 01:40:52AM +0400, Max Filippov wrote:
>> I've also stumbled upon this bug, have a patch for it in the xtensa tree.
>> I guess that the interface was designed to allow combining these flags, why
>> don't just make them independent:
>
> My idea was that negating both the product and c is equivalent to
> negating the result, so there is no need to allow all of them
> independent.
But at least some of them can reasonably be independent, so
at that point you might as well make them all independent flags.
In fact my reading of the PPC ISA is that it needs several combinations:
fmadd : no flags
fnmadd : negate_result
fmsub : negate_c
fnmsub : negate_result | negate_c
...and it looks like your patch is incorrectly only setting negate_result
for the fnmsub case. (I can't see anything handling the fnmadd and fmsub
insns, do we not implement them?)
(negate_product will be used by x86 and SPARC, among others.)
thanks
-- PMM
- [Qemu-devel] [PATCH 4/5] target-ppc: use the softfloat float32_muladd function, (continued)
- [Qemu-devel] [PATCH 4/5] target-ppc: use the softfloat float32_muladd function, Aurelien Jarno, 2012/09/08
- [Qemu-devel] [PATCH 3/5] target-ppc: use the softfloat min/max functions, Aurelien Jarno, 2012/09/08
- [Qemu-devel] [PATCH 5/5] target-ppc: get rid of the HANDLE_NAN{1, 2, 3} macros, Aurelien Jarno, 2012/09/08
- [Qemu-devel] [PATCH 2/5] target-ppc: simplify NaN propagation for vector functions, Aurelien Jarno, 2012/09/08
- Re: [Qemu-devel] [PATCH 1/5] softfloat: fix float{32, 64}_muladd options, Max Filippov, 2012/09/08