Re: [Qemu-devel] [PATCH 4/7] move CPU models from cpus-x86_64.conf to C

[Eduardo Habkost]

On Mon, Sep 10, 2012 at 03:04:30PM +0200, Igor Mammedov wrote:
> On Mon, 10 Sep 2012 14:31:49 +0200
> Igor Mammedov <address@hidden> wrote:
> 
> > On Mon, 10 Sep 2012 14:18:38 +0200
> > Igor Mammedov <address@hidden> wrote:
> > 
> > > On Wed,  5 Sep 2012 17:41:10 -0300
> > > Eduardo Habkost <address@hidden> wrote:
> > > 
> > > > Those models are maintained by QEMU and may require compatibility code
> > > > to be added when making some changes. Keeping the data in the C source
> > > > code should make it simpler to handle those details.
> > > > 
> > > > Signed-off-by: Eduardo Habkost <address@hidden>
> > > > ---
> > > >  sysconfigs/target/cpus-x86_64.conf | 129 +---------------------
> > > >  target-i386/cpu.c                  | 219
> > > > +++++++++++++++++++++++++++++++++++++ 2 files changed, 220
> > > > insertions(+), 128 deletions(-)
> > > > 
> > > > diff --git a/sysconfigs/target/cpus-x86_64.conf
> > > > b/sysconfigs/target/cpus-x86_64.conf index cee0ea9..3902189 100644
> > > > --- a/sysconfigs/target/cpus-x86_64.conf
> > > > +++ b/sysconfigs/target/cpus-x86_64.conf
> > > > @@ -1,128 +1 @@
> > > > -# x86 CPU MODELS
> > > > -
> > > > -[cpudef]
> > > > -   name = "Conroe"
> > > > -   level = "2"
> > > > -   vendor = "GenuineIntel"
> > > > -   family = "6"
> > > > -   model = "2"
> > > > -   stepping = "3"
> > > > -   feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr
> > > > sep apic cx8 mce pae msr tsc pse de fpu"
> > > > -   feature_ecx = "ssse3 sse3"
> > > > -   extfeature_edx = "i64 xd syscall"
> > > ...
> > > > +        .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_NX |
> > > > CPUID_EXT2_SYSCALL,
> > > Silent fix, replacing i64 with CPUID_EXT2_LM
> > > looks like "i64" is mistake and never worked. In Intel & AMD cpuid guides
> > Actually it works when setting feature fields because it uses
> > setfeatures(), however setting i64 will set wrong bit if it's set using
> > add_flagname_to_bitmaps()
> I'm wrong, and sorry for noise. I mixed up ia64 from feature_name with i64
> from ext2_feature_name.
> 
> But question unrelated to this patch is still stand if ia64 is valid bit for
> 01.EDX[30]?

It is reserved on IA-32 and Intel-64/AMD64, but it has a name/meaning,
already[1]. The name of that bit is in the table, but it's harmless (and
useless) because both KVM and TCG modes disable it automatically (and
-cpu check/enforce should warn about it not being supported by the
host).

[1] Linux recognizes it as X86_FEATURE_IA64/"ia64".
Itanium SDM documents it as:
"30 Processor based on the Intel Itanium architecture
"The processor is based on the Intel Itanium architecture and is capable
of executing the Intel Itanium instruction set. IA-32 application level
software MUST also check with the running operating system to see if the
system can also support Itanium architecture-based code before switching
to the Intel Itanium instruction set."

-- 
Eduardo