[Qemu-devel] [PATCH 02/25] pci: add opaque argument to pci_map_irq_fn

[Jason Baron]

From: Isaku Yamahata <address@hidden>

Pass opaque argument to pci_map_irq_fn like pci_set_irq_fn.
ICH9 irq routing is not static, but configurable by chipset configuration
registers, so the corresponding irq mapping function of pci_map_irq_fn
needs to know the pointer to ich9.

address@hidden: minor tweaks]
Signed-off-by: Isaku Yamahata <address@hidden>
Signed-off-by: Jason Baron <address@hidden>
---
 hw/apb_pci.c        |    4 ++--
 hw/bonito.c         |    2 +-
 hw/dec_pci.c        |    2 +-
 hw/grackle_pci.c    |    2 +-
 hw/gt64xxx.c        |    2 +-
 hw/pci.c            |    4 ++--
 hw/pci.h            |    2 +-
 hw/pci_bridge_dev.c |    2 +-
 hw/piix_pci.c       |    2 +-
 hw/ppc4xx_pci.c     |    2 +-
 hw/ppce500_pci.c    |    2 +-
 hw/prep_pci.c       |    2 +-
 hw/sh_pci.c         |    2 +-
 hw/unin_pci.c       |    2 +-
 hw/versatile_pci.c  |    2 +-
 hw/xen.h            |    2 +-
 xen-all.c           |    2 +-
 xen-stub.c          |    2 +-
 18 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/hw/apb_pci.c b/hw/apb_pci.c
index c28411a..1bdac9f 100644
--- a/hw/apb_pci.c
+++ b/hw/apb_pci.c
@@ -285,12 +285,12 @@ static const MemoryRegionOps pci_ioport_ops = {
 };
 
 /* The APB host has an IRQ line for each IRQ line of each slot.  */
-static int pci_apb_map_irq(PCIDevice *pci_dev, int irq_num)
+static int pci_apb_map_irq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     return ((pci_dev->devfn & 0x18) >> 1) + irq_num;
 }
 
-static int pci_pbm_map_irq(PCIDevice *pci_dev, int irq_num)
+static int pci_pbm_map_irq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     int bus_offset;
     if (pci_dev->devfn & 1)
diff --git a/hw/bonito.c b/hw/bonito.c
index 6084ac4..1213652 100644
--- a/hw/bonito.c
+++ b/hw/bonito.c
@@ -651,7 +651,7 @@ static void pci_bonito_set_irq(void *opaque, int irq_num, 
int level)
 }
 
 /* map the original irq (0~3) to bonito irq (16~47, but 16~31 are unused) */
-static int pci_bonito_map_irq(PCIDevice * pci_dev, int irq_num)
+static int pci_bonito_map_irq(void *opaque, PCIDevice * pci_dev, int irq_num)
 {
     int slot;
 
diff --git a/hw/dec_pci.c b/hw/dec_pci.c
index c30ade3..29a10bb 100644
--- a/hw/dec_pci.c
+++ b/hw/dec_pci.c
@@ -46,7 +46,7 @@ typedef struct DECState {
     PCIHostState parent_obj;
 } DECState;
 
-static int dec_map_irq(PCIDevice *pci_dev, int irq_num)
+static int dec_map_irq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     return irq_num;
 }
diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c
index 67da307..d1c4093 100644
--- a/hw/grackle_pci.c
+++ b/hw/grackle_pci.c
@@ -48,7 +48,7 @@ typedef struct GrackleState {
 } GrackleState;
 
 /* Don't know if this matches real hardware, but it agrees with OHW.  */
-static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num)
+static int pci_grackle_map_irq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     return (irq_num + (pci_dev->devfn >> 3)) & 3;
 }
diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c
index e95e664..e251658 100644
--- a/hw/gt64xxx.c
+++ b/hw/gt64xxx.c
@@ -874,7 +874,7 @@ static const MemoryRegionOps isd_mem_ops = {
     .endianness = DEVICE_NATIVE_ENDIAN,
 };
 
-static int gt64120_pci_map_irq(PCIDevice *pci_dev, int irq_num)
+static int gt64120_pci_map_irq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     int slot;
 
diff --git a/hw/pci.c b/hw/pci.c
index b348596..1c847c5 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -128,7 +128,7 @@ static void pci_change_irq_level(PCIDevice *pci_dev, int 
irq_num, int change)
     PCIBus *bus;
     for (;;) {
         bus = pci_dev->bus;
-        irq_num = bus->map_irq(pci_dev, irq_num);
+        irq_num = bus->map_irq(bus->irq_opaque, pci_dev, irq_num);
         if (bus->set_irq)
             break;
         pci_dev = bus->parent_dev;
@@ -1091,7 +1091,7 @@ PCIINTxRoute pci_device_route_intx_to_irq(PCIDevice *dev, 
int pin)
 
     do {
          bus = dev->bus;
-         pin = bus->map_irq(dev, pin);
+         pin = bus->map_irq(bus->irq_opaque, dev, pin);
          dev = bus->parent_dev;
     } while (dev);
     assert(bus->route_intx_to_irq);
diff --git a/hw/pci.h b/hw/pci.h
index 4b6ab3d..26dc522 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -292,7 +292,7 @@ MemoryRegion *pci_address_space(PCIDevice *dev);
 MemoryRegion *pci_address_space_io(PCIDevice *dev);
 
 typedef void (*pci_set_irq_fn)(void *opaque, int irq_num, int level);
-typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
+typedef int (*pci_map_irq_fn)(void *opaque, PCIDevice *pci_dev, int irq_num);
 typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, int pin);
 
 typedef enum {
diff --git a/hw/pci_bridge_dev.c b/hw/pci_bridge_dev.c
index f706396..e72d32d 100644
--- a/hw/pci_bridge_dev.c
+++ b/hw/pci_bridge_dev.c
@@ -43,7 +43,7 @@ typedef struct PCIBridgeDev PCIBridgeDev;
 /* Mapping mandated by PCI-to-PCI Bridge architecture specification,
  * revision 1.2 */
 /* Table 9-1: Interrupt Binding for Devices Behind a Bridge */
-static int pci_bridge_dev_map_irq_fn(PCIDevice *dev, int irq_num)
+static int pci_bridge_dev_map_irq_fn(void *opaque, PCIDevice *dev, int irq_num)
 {
     return (irq_num + PCI_SLOT(dev->devfn)) % PCI_NUM_PINS;
 }
diff --git a/hw/piix_pci.c b/hw/piix_pci.c
index 537fc19..376a287 100644
--- a/hw/piix_pci.c
+++ b/hw/piix_pci.c
@@ -98,7 +98,7 @@ static void piix3_write_config_xen(PCIDevice *dev,
 /* return the global irq number corresponding to a given device irq
    pin. We could also use the bus number to have a more precise
    mapping. */
-static int pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx)
+static int pci_slot_get_pirq(void *opaque, PCIDevice *pci_dev, int pci_intx)
 {
     int slot_addend;
     slot_addend = (pci_dev->devfn >> 3) - 1;
diff --git a/hw/ppc4xx_pci.c b/hw/ppc4xx_pci.c
index a14fd42..2de94d3 100644
--- a/hw/ppc4xx_pci.c
+++ b/hw/ppc4xx_pci.c
@@ -268,7 +268,7 @@ static void ppc4xx_pci_reset(void *opaque)
 
 /* On Bamboo, all pins from each slot are tied to a single board IRQ. This
  * may need further refactoring for other boards. */
-static int ppc4xx_pci_map_irq(PCIDevice *pci_dev, int irq_num)
+static int ppc4xx_pci_map_irq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     int slot = pci_dev->devfn >> 3;
 
diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c
index 92b1dc0..b789f29 100644
--- a/hw/ppce500_pci.c
+++ b/hw/ppce500_pci.c
@@ -233,7 +233,7 @@ static const MemoryRegionOps e500_pci_reg_ops = {
     .endianness = DEVICE_BIG_ENDIAN,
 };
 
-static int mpc85xx_pci_map_irq(PCIDevice *pci_dev, int irq_num)
+static int mpc85xx_pci_map_irq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     int devno = pci_dev->devfn >> 3, ret = 0;
 
diff --git a/hw/prep_pci.c b/hw/prep_pci.c
index cc44e61..2493b7a 100644
--- a/hw/prep_pci.c
+++ b/hw/prep_pci.c
@@ -91,7 +91,7 @@ static const MemoryRegionOps PPC_intack_ops = {
     },
 };
 
-static int prep_map_irq(PCIDevice *pci_dev, int irq_num)
+static int prep_map_irq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     return (irq_num + (pci_dev->devfn >> 3)) & 1;
 }
diff --git a/hw/sh_pci.c b/hw/sh_pci.c
index 0cfac46..76a5e5f 100644
--- a/hw/sh_pci.c
+++ b/hw/sh_pci.c
@@ -98,7 +98,7 @@ static const MemoryRegionOps sh_pci_reg_ops = {
     },
 };
 
-static int sh_pci_map_irq(PCIDevice *d, int irq_num)
+static int sh_pci_map_irq(void *opaque, PCIDevice *d, int irq_num)
 {
     return (d->devfn >> 3);
 }
diff --git a/hw/unin_pci.c b/hw/unin_pci.c
index d1cc680..a8ae95a 100644
--- a/hw/unin_pci.c
+++ b/hw/unin_pci.c
@@ -59,7 +59,7 @@ typedef struct UNINState {
     MemoryRegion pci_hole;
 } UNINState;
 
-static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num)
+static int pci_unin_map_irq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     int retval;
     int devfn = pci_dev->devfn & 0x00FFFFFF;
diff --git a/hw/versatile_pci.c b/hw/versatile_pci.c
index ae53a8b..1f4e6b6 100644
--- a/hw/versatile_pci.c
+++ b/hw/versatile_pci.c
@@ -46,7 +46,7 @@ static const MemoryRegionOps pci_vpb_config_ops = {
     .endianness = DEVICE_NATIVE_ENDIAN,
 };
 
-static int pci_vpb_map_irq(PCIDevice *d, int irq_num)
+static int pci_vpb_map_irq(void *opaque, PCIDevice *d, int irq_num)
 {
     return irq_num;
 }
diff --git a/hw/xen.h b/hw/xen.h
index e5926b7..d43b883 100644
--- a/hw/xen.h
+++ b/hw/xen.h
@@ -31,7 +31,7 @@ static inline int xen_enabled(void)
 #endif
 }
 
-int xen_pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num);
+int xen_pci_slot_get_pirq(void *opaque, PCIDevice *pci_dev, int irq_num);
 void xen_piix3_set_irq(void *opaque, int irq_num, int level);
 void xen_piix_pci_write_config_client(uint32_t address, uint32_t val, int len);
 void xen_hvm_inject_msi(uint64_t addr, uint32_t data);
diff --git a/xen-all.c b/xen-all.c
index f76b051..22ee5a3 100644
--- a/xen-all.c
+++ b/xen-all.c
@@ -99,7 +99,7 @@ typedef struct XenIOState {
 
 /* Xen specific function for piix pci */
 
-int xen_pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num)
+int xen_pci_slot_get_pirq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     return irq_num + ((pci_dev->devfn >> 3) << 2);
 }
diff --git a/xen-stub.c b/xen-stub.c
index 8ff2b79..5f71f43 100644
--- a/xen-stub.c
+++ b/xen-stub.c
@@ -16,7 +16,7 @@ void xenstore_store_pv_console_info(int i, CharDriverState 
*chr)
 {
 }
 
-int xen_pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num)
+int xen_pci_slot_get_pirq(void *opaque, PCIDevice *pci_dev, int irq_num)
 {
     return -1;
 }
-- 
1.7.1