Re: [Qemu-devel] [PATCH 1/2] e500: Adding CCSR memory region

[Alexander Graf]

On 03.10.2012, at 14:16, Bhushan Bharat-R65777 wrote:

> 
> 
>> -----Original Message-----
>> From: Alexander Graf [mailto:address@hidden
>> Sent: Wednesday, October 03, 2012 5:39 PM
>> To: Bhushan Bharat-R65777
>> Cc: address@hidden; address@hidden; Bhushan Bharat-R65777
>> Subject: Re: [PATCH 1/2] e500: Adding CCSR memory region
>> 
>> 
>> On 03.10.2012, at 13:49, Bharat Bhushan wrote:
>> 
>>> All devices are also placed under CCSR memory region.
>>> The CCSR memory region is exported to pci device. The MSI interrupt
>>> generation is the main reason to export the CCSR region to PCI device.
>>> This put the requirement to move mpic under CCSR region, but logically
>>> all devices should be under CCSR. So this patch places all emulated
>>> devices under ccsr region.
>>> 
>>> Signed-off-by: Bharat Bhushan <address@hidden>
>>> ---
>>> hw/ppc/e500.c |   51 +++++++++++++++++++++++++++++++++++++--------------
>>> 1 files changed, 37 insertions(+), 14 deletions(-)
>>> 
>>> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 5bab340..197411d
>>> 100644
>>> --- a/hw/ppc/e500.c
>>> +++ b/hw/ppc/e500.c
>>> @@ -46,14 +46,23 @@
>>> /* TODO: parameterize */
>>> #define MPC8544_CCSRBAR_BASE       0xE0000000ULL
>>> #define MPC8544_CCSRBAR_SIZE       0x00100000ULL
>>> -#define MPC8544_MPIC_REGS_BASE     (MPC8544_CCSRBAR_BASE + 0x40000ULL)
>>> -#define MPC8544_SERIAL0_REGS_BASE  (MPC8544_CCSRBAR_BASE + 0x4500ULL)
>>> -#define MPC8544_SERIAL1_REGS_BASE  (MPC8544_CCSRBAR_BASE + 0x4600ULL)
>>> -#define MPC8544_PCI_REGS_BASE      (MPC8544_CCSRBAR_BASE + 0x8000ULL)
>>> +#define MPC8544_MPIC_REGS_OFFSET   0x40000ULL
>>> +#define MPC8544_MPIC_REGS_BASE     (MPC8544_CCSRBAR_BASE + \
>>> +                                    MPC8544_MPIC_REGS_OFFSET) #define
>>> +MPC8544_SERIAL0_REGS_OFFSET 0x4500ULL #define
>>> +MPC8544_SERIAL0_REGS_BASE  (MPC8544_CCSRBAR_BASE + \
>>> +                                    MPC8544_SERIAL0_REGS_OFFSET)
>>> +#define MPC8544_SERIAL1_REGS_OFFSET 0x4600ULL #define
>>> +MPC8544_SERIAL1_REGS_BASE  (MPC8544_CCSRBAR_BASE + \
>>> +                                    MPC8544_SERIAL1_REGS_OFFSET)
>>> +#define MPC8544_PCI_REGS_OFFSET    0x8000ULL
>>> +#define MPC8544_PCI_REGS_BASE      (MPC8544_CCSRBAR_BASE + \
>>> +                                    MPC8544_PCI_REGS_OFFSET)
>> 
>> You don't use any of the bases anymore, right? Please remove the respective
>> #define's.
> 
> Alex, some of these bases are used in device tree creation code.

But they're used by subtracting the ccsr base from them again, no? :) We should 
just use the offsets there directly.


Alex