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Re: [Qemu-devel] [PATCH v2 04/21] pci: introduce pci_swizzle_map_irq_fn(
From: |
Paolo Bonzini |
Subject: |
Re: [Qemu-devel] [PATCH v2 04/21] pci: introduce pci_swizzle_map_irq_fn() for standardized interrupt pin swizzle |
Date: |
Tue, 09 Oct 2012 09:39:12 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:15.0) Gecko/20120911 Thunderbird/15.0.1 |
Il 09/10/2012 05:30, Jason Baron ha scritto:
> From: Isaku Yamahata <address@hidden>
>
> Introduce pci_swizzle_map_irq_fn() for interrupt pin swizzle which is
> standardized. PCI bridge swizzle is common logic, by introducing
> this function duplicated swizzle logic will be avoided later.
>
> address@hidden: drop opaque argument]
> Signed-off-by: Isaku Yamahata <address@hidden>
> Signed-off-by: Jason Baron <address@hidden>
Reviewed-by: Paolo Bonzini <address@hidden>
> ---
> hw/pci.c | 18 ++++++++++++++++++
> hw/pci.h | 2 ++
> 2 files changed, 20 insertions(+), 0 deletions(-)
>
> diff --git a/hw/pci.c b/hw/pci.c
> index 85ebef6..c457d50 100644
> --- a/hw/pci.c
> +++ b/hw/pci.c
> @@ -1121,6 +1121,24 @@ void pci_device_set_intx_routing_notifier(PCIDevice
> *dev,
> dev->intx_routing_notifier = notifier;
> }
>
> +/*
> + * PCI-to-PCI bridge specification
> + * 9.1: Interrupt routing. Table 9-1
> + *
> + * the PCI Express Base Specification, Revision 2.1
> + * 2.2.8.1: INTx interrutp signaling - Rules
> + * the Implementation Note
> + * Table 2-20
> + */
> +/*
> + * 0 <= pin <= 3 0 = INTA, 1 = INTB, 2 = INTC, 3 = INTD
> + * 0-origin unlike PCI interrupt pin register.
> + */
> +int pci_swizzle_map_irq_fn(PCIDevice *pci_dev, int pin)
> +{
> + return (pin + PCI_SLOT(pci_dev->devfn)) % PCI_NUM_PINS;
> +}
> +
> /***********************************************************/
> /* monitor info on PCI */
>
> diff --git a/hw/pci.h b/hw/pci.h
> index 4b6ab3d..397477e 100644
> --- a/hw/pci.h
> +++ b/hw/pci.h
> @@ -316,6 +316,8 @@ void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq,
> pci_map_irq_fn map_irq,
> void *irq_opaque, int nirq);
> int pci_bus_get_irq_level(PCIBus *bus, int irq_num);
> void pci_bus_hotplug(PCIBus *bus, pci_hotplug_fn hotplug, DeviceState *dev);
> +/* 0 <= pin <= 3 0 = INTA, 1 = INTB, 2 = INTC, 3 = INTD */
> +int pci_swizzle_map_irq_fn(PCIDevice *pci_dev, int pin);
> PCIBus *pci_register_bus(DeviceState *parent, const char *name,
> pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
> void *irq_opaque,
>
- [Qemu-devel] [PATCH v2 00/21] q35 qemu support, Jason Baron, 2012/10/08
- [Qemu-devel] [PATCH v2 03/21] pci: pci capability must be in PCI space, Jason Baron, 2012/10/08
- [Qemu-devel] [PATCH v2 05/21] pc, pc_piix: split out pc nic initialization, Jason Baron, 2012/10/08
- [Qemu-devel] [PATCH v2 04/21] pci: introduce pci_swizzle_map_irq_fn() for standardized interrupt pin swizzle, Jason Baron, 2012/10/08
- Re: [Qemu-devel] [PATCH v2 04/21] pci: introduce pci_swizzle_map_irq_fn() for standardized interrupt pin swizzle,
Paolo Bonzini <=
- [Qemu-devel] [PATCH v2 02/21] blockdev: Introduce IF_AHCI, Jason Baron, 2012/10/08
- [Qemu-devel] [PATCH v2 06/21] pc: Move ioapic_init() from pc_piix.c to pc.c, Jason Baron, 2012/10/08
- [Qemu-devel] [PATCH v2 01/21] blockdev: Introduce a default machine blockdev interface field, QEMUMachine->mach_if, Jason Baron, 2012/10/08
- [Qemu-devel] [PATCH v2 09/21] pci: Add class 0xc05 as 'SMBus', Jason Baron, 2012/10/08
- [Qemu-devel] [PATCH v2 10/21] pcie: pass pcie window size to pcie_host_mmcfg_update(), Jason Baron, 2012/10/08