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[Qemu-devel] [PATCH 03/14] target-mips: fix FPU exceptions
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PATCH 03/14] target-mips: fix FPU exceptions |
Date: |
Tue, 9 Oct 2012 22:27:27 +0200 |
For each FPU instruction that can trigger an FPU exception, it is needed
to reset the softfloat status before and call update_fcr31() after.
Remove the manual NaN assignment in case of float to float operation, as
softfloat is already taking care of that. However for float to int
operation, the value has to be changed to the MIPS one. In the cvtpw_ps
case, the two registers have to be handled separately to guarantee
a correct final value in both registers.
Signed-off-by: Aurelien Jarno <address@hidden>
---
target-mips/op_helper.c | 34 +++++++++++++++++++++-------------
1 file changed, 21 insertions(+), 13 deletions(-)
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 9d6d54a..bd3c37c 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -2444,12 +2444,18 @@ static inline void update_fcr31(CPUMIPSState *env)
/* unary operations, modifying fp status */
uint64_t helper_float_sqrt_d(CPUMIPSState *env, uint64_t fdt0)
{
- return float64_sqrt(fdt0, &env->active_fpu.fp_status);
+ set_float_exception_flags(0, &env->active_fpu.fp_status);
+ fdt0 = float64_sqrt(fdt0, &env->active_fpu.fp_status);
+ update_fcr31(env);
+ return fdt0;
}
uint32_t helper_float_sqrt_s(CPUMIPSState *env, uint32_t fst0)
{
- return float32_sqrt(fst0, &env->active_fpu.fp_status);
+ set_float_exception_flags(0, &env->active_fpu.fp_status);
+ fst0 = float32_sqrt(fst0, &env->active_fpu.fp_status);
+ update_fcr31(env);
+ return fst0;
}
uint64_t helper_float_cvtd_s(CPUMIPSState *env, uint32_t fst0)
@@ -2522,15 +2528,25 @@ uint64_t helper_float_cvtpw_ps(CPUMIPSState *env,
uint64_t fdt0)
{
uint32_t wt2;
uint32_t wth2;
+ int excp, excph;
set_float_exception_flags(0, &env->active_fpu.fp_status);
wt2 = float32_to_int32(fdt0 & 0XFFFFFFFF, &env->active_fpu.fp_status);
- wth2 = float32_to_int32(fdt0 >> 32, &env->active_fpu.fp_status);
- update_fcr31(env);
- if (GET_FP_CAUSE(env->active_fpu.fcr31) & (FP_OVERFLOW | FP_INVALID)) {
+ excp = get_float_exception_flags(&env->active_fpu.fp_status);
+ if (excp & (float_flag_overflow | float_flag_invalid)) {
wt2 = FLOAT_SNAN32;
+ }
+
+ set_float_exception_flags(0, &env->active_fpu.fp_status);
+ wth2 = float32_to_int32(fdt0 >> 32, &env->active_fpu.fp_status);
+ excph = get_float_exception_flags(&env->active_fpu.fp_status);
+ if (excph & (float_flag_overflow | float_flag_invalid)) {
wth2 = FLOAT_SNAN32;
}
+
+ set_float_exception_flags(excp | excph, &env->active_fpu.fp_status);
+ update_fcr31(env);
+
return ((uint64_t)wth2 << 32) | wt2;
}
@@ -2970,8 +2986,6 @@ uint64_t helper_float_ ## name ## _d(CPUMIPSState *env,
\
set_float_exception_flags(0, &env->active_fpu.fp_status); \
dt2 = float64_ ## name (fdt0, fdt1, &env->active_fpu.fp_status); \
update_fcr31(env); \
- if (GET_FP_CAUSE(env->active_fpu.fcr31) & FP_INVALID) \
- dt2 = FLOAT_QNAN64; \
return dt2; \
} \
\
@@ -2983,8 +2997,6 @@ uint32_t helper_float_ ## name ## _s(CPUMIPSState *env,
\
set_float_exception_flags(0, &env->active_fpu.fp_status); \
wt2 = float32_ ## name (fst0, fst1, &env->active_fpu.fp_status); \
update_fcr31(env); \
- if (GET_FP_CAUSE(env->active_fpu.fcr31) & FP_INVALID) \
- wt2 = FLOAT_QNAN32; \
return wt2; \
} \
\
@@ -3003,10 +3015,6 @@ uint64_t helper_float_ ## name ## _ps(CPUMIPSState *env,
\
wt2 = float32_ ## name (fst0, fst1, &env->active_fpu.fp_status); \
wth2 = float32_ ## name (fsth0, fsth1, &env->active_fpu.fp_status); \
update_fcr31(env); \
- if (GET_FP_CAUSE(env->active_fpu.fcr31) & FP_INVALID) { \
- wt2 = FLOAT_QNAN32; \
- wth2 = FLOAT_QNAN32; \
- } \
return ((uint64_t)wth2 << 32) | wt2; \
}
--
1.7.10.4
- [Qemu-devel] [PATCH 00/14] target-mips: misc fixes and optimizations, Aurelien Jarno, 2012/10/09
- [Qemu-devel] [PATCH 09/14] target-mips: don't use local temps for store conditional, Aurelien Jarno, 2012/10/09
- [Qemu-devel] [PATCH 07/14] target-mips: simplify load/store microMIPS helpers, Aurelien Jarno, 2012/10/09
- [Qemu-devel] [PATCH 01/14] softfloat: implement fused multiply-add NaN propagation for MIPS, Aurelien Jarno, 2012/10/09
- [Qemu-devel] [PATCH 03/14] target-mips: fix FPU exceptions,
Aurelien Jarno <=
- [Qemu-devel] [PATCH 14/14] target-mips: don't flush extra TLB on permissions upgrade, Aurelien Jarno, 2012/10/09
- [Qemu-devel] [PATCH 12/14] target-mips: use deposit instead of hardcoded version, Aurelien Jarno, 2012/10/09
- [Qemu-devel] [PATCH 13/14] target-mips: fix TLBR wrt SEGMask, Aurelien Jarno, 2012/10/09
- [Qemu-devel] [PATCH 04/14] target-mips: use softfloat constants when possible, Aurelien Jarno, 2012/10/09
- [Qemu-devel] [PATCH 05/14] target-mips: cleanup load/store operations, Aurelien Jarno, 2012/10/09