Re: [Qemu-devel] [PATCH v2] hw/armv7m_nvic: Implement byte/halfword access for NVIC SCB_SHPRx registers

[Peter Maydell]

On 14 October 2012 19:43, Andre Beckus <address@hidden> wrote:
> Implement byte/halfword read and write for the NVIC SCB_SHPRx
> (System Handler Priority Registers).  Do this by removing SHPR word access
> from nvic_readl/writel and adding common code to hande all access
> sizes in nvic_sysreg_read/write.
>
> Because the "nvic_state *s" variable now needs to be declared in
> nvic_sysreg_read/write, the "void *opaque" parameter of
> nvic_readl/writel is changed to "nvic_state *s".
>
> Signed-off-by: Andre Beckus <address@hidden>

Reviewed-by: Peter Maydell <address@hidden>
and added to arm-devs.next.

thanks!
-- PMM