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Re: [Qemu-devel] [PATCH v2 0/2] target-arm: inline abs, 64-bit negate


From: Aurelien Jarno
Subject: Re: [Qemu-devel] [PATCH v2 0/2] target-arm: inline abs, 64-bit negate
Date: Sat, 20 Oct 2012 00:05:03 +0200
User-agent: Mutt/1.5.21 (2010-09-15)

On Fri, Oct 19, 2012 at 02:06:57PM +0100, Peter Maydell wrote:
> Two minor patches which inline some operations rather than using helper
> functions. The 64 bit negate is a no-brainer since there's a simple
> TCG op for it. For abs we implement in terms of movcond:
>  movi_i32 tmp6,$0x0
>  neg_i32 tmp7,tmp5
>  movcond_i32 tmp5,tmp5,tmp6,tmp5,tmp7,gt
> which the x86-64 backend turns into:
>  0x603b53a7:  mov    %ebp,%ebx
>  0x603b53a9:  neg    %ebx
>  0x603b53ab:  mov    %ebp,%r12d
>  0x603b53ae:  test   %ebp,%ebp
>  0x603b53b0:  cmovle %ebx,%r12d
> 
> Not sure why it felt the need to use an extra move there, but

Difficult to say without saying the whole TB, but likely because 
both %ebp and %r12d are not dead after the movcond, and are used
separately.

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
address@hidden                 http://www.aurel32.net



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