Re: [Qemu-devel] [PATCH v3 00/26] q35 qemu support

[Michael S. Tsirkin]

On Fri, Oct 19, 2012 at 04:43:25PM -0400, Jason Baron wrote:
> Hi,
> 
> Qemu bits for q35 support, I'm posting the seabios changes separately. The
> patches require '-M pc_q35' and -L 'seabios dir with q35 changes' on the
> qemu command line. Hopefully, we can make it the default for x86 at some 
> future
> point when we feel comfortable with it.
> 
> The current patches have been tested with basic install testing and memory 
> testing
> on f16, f17, windows 7 and windows 8. They can be run on the various BSD 
> flavors
> by adding a 'piix4-ide' device to the pci bus. ie: -device piix4-ide. Patches
> have also been reported to work with a small dsdt change on OSX 10.6 as well.
> 
> I've dropped the ahci migration bits, which means q35 is not migratable at the
> moment. I simply haven't had time to make them more complete yet.
> 
> I'm hoping that we'll come to some agreement on the minimal functionality
> required for q35 to be merged.
> 
> Git trees:
> 
> git://github.com/jibaron/q35-qemu.git
> git://github.com/jibaron/q35-seabios.git
> 
> 
> Notes:
> 
> I've dropped automatic load of the dsdt table on the piix for now. We can't
> pull this in until we have snapshot of the dsdt aml, and I wanted it to be
> done at a clean seabios freeze point (Although I guess that could be the
> current snapshot). I don't see the harm in pulling this in later though.
> 
> I've also gone to a model of the pci host being sparse:
> 
> 00:00.0 Host bridge: Intel Corporation 82G33/G31/P35/P31 Express DRAM 
> Controller
> 00:01.0 VGA compatible controller: Cirrus Logic GD 5446
> 00:02.0 Ethernet controller: Intel Corporation 82540EM Gigabit Ethernet 
> Controller (rev 03)
> 00:1f.0 ISA bridge: Intel Corporation 82801IB (ICH9) LPC Interface Controller 
> (rev 02)
> 00:1f.2 SATA controller: Intel Corporation 82801IR/IO/IH (ICH9R/DO/DH) 6 port 
> SATA AHCI Controller (rev 02)
> 00:1f.3 SMBus: Intel Corporation 82801I (ICH9 Family) SMBus Controller (rev 
> 02)
> 
> The idea is only to populate the essential stuff at 1f, and have the rest
> filled out via command line options. In this way we have minimal bus 
> configuration
> with 1 slot occupied as in piix. Should make things easier for libvirt. And 
> this
> way user has complete control over things. For example, I have added support 
> that
> when '-usb' is passed the usb controllers for ich9 are filled out.
> 
> Todo:
> 
> -add ahci migration back (need to cover more fields, but basically works)
> -add base addr for hpet in LPC device (for osx per agraf)
> -convert hotplug to use MemoryRegionPortio for hotplug (need an IsaDevice?)
> 
> Thanks,
> 
> -Jason

To me it looks like it's best to merge these bits so
the patchset stops growing. However I'd like to make sure
we don't create user confusion with all the missing bits.

Would it make sense to temporarily rename the machine type e.g.
pc-q35-experimental to stress it's not fully supported?

-- 
MST