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Re: [Qemu-devel] [PATCH 36/37] target-i386: use static properties to lis
From: |
Eduardo Habkost |
Subject: |
Re: [Qemu-devel] [PATCH 36/37] target-i386: use static properties to list CPUID features |
Date: |
Wed, 24 Oct 2012 12:00:02 -0200 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Tue, Oct 23, 2012 at 01:23:43PM -0400, Don Slutz wrote:
> Turns out that patch #32 is the one that causes the command line:
>
> ./x86_64-softmmu/qemu-system-x86_64 -cpu
> 486,+fpu,+vme,+de,+pse,+tsc,+msr,+pae,+mce,+cx8,+apic,+sep,+mtrr,+pge,+mca,+cmov,+pat,+pse36,+pn,+clflush,+ds,+acpi,+mmx,+fxsr,+sse,+sse2,+ss,+ht,+tm,+ia64,+pbe,+pni,+sse3,+pclmulqdq,+pclmuldq,+dtes64,+monitor,+ds_cpl,+vmx,+smx,+est,+tm2,+ssse3,+cid,+fma,+cx16,+xtpr,+pdcm,+pcid,+dca,+sse4.1,+sse4.2,+sse4_1,+sse4_2,+x2apic,+movbe,+popcnt,+tsc-deadline,+aes,+xsave,+osxsave,+avx,+hypervisor,+syscall,+nx,+xd,+mmxext,+fxsr_opt,+ffxsr,+pdpe1gb,+rdtscp,+lahf_lm,+cmp_legacy,+svm,+extapic,+cr8legacy,+abm,+sse4a,+misalignsse,+3dnowprefetch,+osvw,+ibs,+xop,+skinit,+wdt,+fma4,+cvt16,+nodeid_msr,+kvmclock1,+kvm_nopiodelay,+kvm_mmu,+kvmclock2,+kvm_asyncpf,+kvm_steal_tm,+kvm_pv_eoi,+kvmclock_stable,+npt,+lbrv,+svm_lock,+nrip_save,+tsc_scale,+vmcb_clean,+flushbyasid,+decodeassists,+pause_filter,+pfthreshold,+smep,+smap,family=6,model=23,stepping=10,level=13,xlevel=0x80000008,vendor="GenuineIntel",model-id="Intel(R)
> Core(TM)2 Quad CPU Q9650 @
> 3.00GHz",+pbe,+tm,+ht,+ss,+sse2,+sse,+fxsr,+mmx,+acpi,+ds,+clflush,+pse36,+pat,+cmov,+mca,+pge,+mtrr,+sep,+apic,+cx8,+mce,+pae,+msr,+tsc,+pse,+de,+vme,+fpu,+osxsave,+xsave,+sse4_1,+pdcm,+xtpr,+cx16,+ssse3,+tm2,+est,+smx,+vmx,+ds_cpl,+monitor,+dtes64,+sse3,+nx,+lahf_lm
> ~/qemu-img/CentOS5-32.raw -cdrom
> /isos/iso/centos/i386/CentOS-5.3-i386-bin-DVD.iso -machine
> pc,accel=kvm -m 1024 -monitor stdio
>
> to stop allowing 64bit code to run. However this patch has the key
> info (see below).
>
> On 10/22/12 11:03, Igor Mammedov wrote:
> >convert x86_cpu_list() to use QDEV_FIND_PROP_FROM_BIT() for getting
> >CPUID feature name.
> >In addition since x86_cpu_list() was the last user of *feature_name
> >arrays, clean them up.
> >
> >Signed-off-by: Igor Mammedov <address@hidden>
> >---
> > target-i386/cpu.c | 106
> > +++++++++++-------------------------------------------
> > 1 file changed, 20 insertions(+), 86 deletions(-)
> >
> >diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> >index 89ef2a7..8d7718c 100644
> >--- a/target-i386/cpu.c
> >+++ b/target-i386/cpu.c
> >@@ -38,55 +38,6 @@
> > #include <linux/kvm_para.h>
> > #endif
> >-/* feature flags taken from "Intel Processor Identification and the CPUID
> >- * Instruction" and AMD's "CPUID Specification". In cases of disagreement
> >- * between feature naming conventions, aliases may be added.
> >- */
> >-static const char *feature_name[] = {
> >- "fpu", "vme", "de", "pse",
> >- "tsc", "msr", "pae", "mce",
> >- "cx8", "apic", NULL, "sep",
> >- "mtrr", "pge", "mca", "cmov",
> >- "pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */,
> >- NULL, "ds" /* Intel dts */, "acpi", "mmx",
> >- "fxsr", "sse", "sse2", "ss",
> >- "ht" /* Intel htt */, "tm", "ia64", "pbe",
> >-};
> >-static const char *ext_feature_name[] = {
> >- "pni|sse3" /* Intel,AMD sse3 */, "pclmulqdq|pclmuldq", "dtes64",
> >"monitor",
> >- "ds_cpl", "vmx", "smx", "est",
> >- "tm2", "ssse3", "cid", NULL,
> >- "fma", "cx16", "xtpr", "pdcm",
> >- NULL, "pcid", "dca", "sse4.1|sse4_1",
> >- "sse4.2|sse4_2", "x2apic", "movbe", "popcnt",
> >- "tsc-deadline", "aes", "xsave", "osxsave",
> >- "avx", NULL, NULL, "hypervisor",
> >-};
> >-/* Feature names that are already defined on feature_name[] but are set on
> >- * CPUID[8000_0001].EDX on AMD CPUs don't have their names on
> >- * ext2_feature_name[]. They are copied automatically to cpuid_ext2_features
> >- * if and only if CPU vendor is AMD.
> >- */
> >-static const char *ext2_feature_name[] = {
> >- NULL /* fpu */, NULL /* vme */, NULL /* de */, NULL /* pse */,
> >- NULL /* tsc */, NULL /* msr */, NULL /* pae */, NULL /* mce */,
> >- NULL /* cx8 */ /* AMD CMPXCHG8B */, NULL /* apic */, NULL, "syscall",
> >- NULL /* mtrr */, NULL /* pge */, NULL /* mca */, NULL /* cmov */,
> >- NULL /* pat */, NULL /* pse36 */, NULL, NULL /* Linux mp */,
> >- "nx|xd", NULL, "mmxext", NULL /* mmx */,
> >- NULL /* fxsr */, "fxsr_opt|ffxsr", "pdpe1gb" /* AMD Page1GB */,
> >"rdtscp",
> >-};
> This array does not have 32 entries. And at least on my test
> machine "+lahf_lm" sets ext2_feature bit 29 (and also ext3_feature
> bit 0).
Ouch. I broke the code on commit
3b671a40cab2404bc63e57db8cd3afa4ec70bfab. I will send a fix ASAP.
>
> From http://www.sandpile.org/x86/cpuid.htm#level_8000_0001h
>
> bit 29 (LM) AMD64/EM64T, Long Mode
>
>
> bit 29 (LM) AMD64/EM64T, Long Mode
>
> (And the next 2 bits are defined as well:
> bit 30 (3DNow!+) extended 3DNow!
> bit 31 (3DNow!) 3DNow!
> ).
>
> Since master has this bug (feature?), I feel that access to ext2 bit
> 29 is needed ("f-lm" ?)
The 1.2.0 code had the following line:
NULL, "lm|i64", "3dnowext", "3dnow",
We just need to re-add it (and add the corresponding properties when
converting it to static properties).
>
> -Don Slutz
> >-static const char *ext3_feature_name[] = {
> >- "lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD
> >ExtApicSpace */,
> >- "cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse",
> >- "3dnowprefetch", "osvw", "ibs", "xop",
> >- "skinit", "wdt", NULL, NULL,
> >- "fma4", NULL, "cvt16", "nodeid_msr",
> >- NULL, NULL, NULL, NULL,
> >- NULL, NULL, NULL, NULL,
> >- NULL, NULL, NULL, NULL,
> >-};
> >-
> > #if defined(CONFIG_KVM)
> > static void x86_cpu_get_kvmclock(Object *obj, Visitor *v, void *opaque,
> > const char *name, Error **errp)
> >@@ -1495,35 +1446,22 @@ error:
> > return -1;
> > }
> >-/* generate a composite string into buf of all cpuid names in featureset
> >- * selected by fbits. indicate truncation at bufsize in the event of
> >overflow.
> >- * if flags, suppress names undefined in featureset.
> >- */
> >-static void listflags(char *buf, int bufsize, uint32_t fbits,
> >- const char **featureset, uint32_t flags)
> >-{
> >- const char **p = &featureset[31];
> >- char *q, *b, bit;
> >- int nc;
> >-
> >- b = 4 <= bufsize ? buf + (bufsize -= 3) - 1 : NULL;
> >- *buf = '\0';
> >- for (q = buf, bit = 31; fbits && bufsize; --p, fbits &= ~(1 << bit),
> >--bit)
> >- if (fbits & 1 << bit && (*p || !flags)) {
> >- if (*p)
> >- nc = snprintf(q, bufsize, "%s%s", q == buf ? "" : " ", *p);
> >- else
> >- nc = snprintf(q, bufsize, "%s[%d]", q == buf ? "" : " ",
> >bit);
> >- if (bufsize <= nc) {
> >- if (b) {
> >- memcpy(b, "...", sizeof("..."));
> >- }
> >- return;
> >- }
> >- q += nc;
> >- bufsize -= nc;
> >- }
> >-}
> >+#define LIST_FLAGS(_typename, _state, _field) \
> >+ do { \
> >+ int i; \
> >+ const Property *prop; \
> >+ const DeviceClass *dc; \
> >+ dc = DEVICE_CLASS(object_class_by_name((_typename))); \
> >+ (*cpu_fprintf)(f, " "); \
> >+ for (i = 31; i; --i) { \
> >+ prop = QDEV_FIND_PROP_FROM_BIT(dc, _state, _field, i); \
> >+ if (prop) { \
> >+ /* for compatibility do not print f- prefix */ \
> >+ (*cpu_fprintf)(f, " %s", prop->name + 2); \
> >+ } \
> >+ } \
> >+ (*cpu_fprintf)(f, "\n"); \
> >+ } while (0)
> > /* generate CPU information. */
> > void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf)
> >@@ -1539,14 +1477,10 @@ void x86_cpu_list(FILE *f, fprintf_function
> >cpu_fprintf)
> > (*cpu_fprintf)(f, "x86 %16s\n", "[host]");
> > }
> > (*cpu_fprintf)(f, "\nRecognized CPUID flags:\n");
> >- listflags(buf, sizeof(buf), (uint32_t)~0, feature_name, 1);
> >- (*cpu_fprintf)(f, " %s\n", buf);
> >- listflags(buf, sizeof(buf), (uint32_t)~0, ext_feature_name, 1);
> >- (*cpu_fprintf)(f, " %s\n", buf);
> >- listflags(buf, sizeof(buf), (uint32_t)~0, ext2_feature_name, 1);
> >- (*cpu_fprintf)(f, " %s\n", buf);
> >- listflags(buf, sizeof(buf), (uint32_t)~0, ext3_feature_name, 1);
> >- (*cpu_fprintf)(f, " %s\n", buf);
> >+ LIST_FLAGS(TYPE_X86_CPU, CPUX86State, cpuid_features);
> >+ LIST_FLAGS(TYPE_X86_CPU, CPUX86State, cpuid_ext_features);
> >+ LIST_FLAGS(TYPE_X86_CPU, CPUX86State, cpuid_ext2_features);
> >+ LIST_FLAGS(TYPE_X86_CPU, CPUX86State, cpuid_ext3_features);
> > }
> > CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp)
>
>
--
Eduardo
- [Qemu-devel] [PATCH 20/37] target-i386: convert 'hv_spinlocks' to static property, (continued)
- [Qemu-devel] [PATCH 20/37] target-i386: convert 'hv_spinlocks' to static property, Igor Mammedov, 2012/10/22
- [Qemu-devel] [PATCH 19/37] qdev: add DEFINE_ABSTRACT_PROP() helper, Igor Mammedov, 2012/10/22
- [Qemu-devel] [PATCH 34/37] qdev: introduce QDEV_FIND_PROP_FROM_BIT and qdev_prop_find_bit(), Igor Mammedov, 2012/10/22
- [Qemu-devel] [PATCH 25/37] target-i386: replace uint32_t vendor fields by vendor string in x86_def_t, Igor Mammedov, 2012/10/22
- [Qemu-devel] [PATCH 23/37] target-i386: convert 'check' and 'enforce' to static properties, Igor Mammedov, 2012/10/22
- [Qemu-devel] [PATCH 36/37] target-i386: use static properties to list CPUID features, Igor Mammedov, 2012/10/22
- Re: [Qemu-devel] [PATCH 36/37] target-i386: use static properties to list CPUID features, Don Slutz, 2012/10/23
- Re: [Qemu-devel] [PATCH 36/37] target-i386: use static properties to list CPUID features,
Eduardo Habkost <=
- [Qemu-devel] [PATCH 37/37] target-i386: cleanup cpu_x86_find_by_name(), only fill x86_def_t in it, Igor Mammedov, 2012/10/22
- [Qemu-devel] [PATCH 26/37] target-i386: convert "vendor" property to static property, Igor Mammedov, 2012/10/22
- [Qemu-devel] [PATCH 30/37] target-i386: convert "model" to static property, Igor Mammedov, 2012/10/22
- [Qemu-devel] [PATCH 24/37] target-i386: use define for cpuid vendor string size, Igor Mammedov, 2012/10/22
- [Qemu-devel] [PATCH 09/37] qdev: export qdev_prop_find() and allow it to be used with DeviceClass instead of Object, Igor Mammedov, 2012/10/22
- [Qemu-devel] [PATCH 27/37] target-i386: convert "tsc-frequency" to static property, Igor Mammedov, 2012/10/22
- [Qemu-devel] [PATCH 15/37] target-i386: set default value of "hypervisor" feature using static property, Igor Mammedov, 2012/10/22