Re: [Qemu-devel] [PATCH v1 8/8] usb/ehci: Put RAM in undefined MMIO regions

[Peter Maydell]

On 25 October 2012 14:59, Peter Crosthwaite
<address@hidden> wrote:
> On Thu, Oct 25, 2012 at 11:50 PM, Peter Maydell
> <address@hidden> wrote:
>> On 25 October 2012 14:41, Avi Kivity <address@hidden> wrote:
>>> wrt decode duplication, I've been thinking of a single ->service()
>>> callback that accepts a Transaction argument, including all the details
>>> (offset, data, and direction).
>>
>> If we do this we should make sure that the Transaction allows us to
>> include CPU-architecture dependent info -- for ARM we would want to
>> model transaction attributes like 'secure/nonsecure', 'privileged/nonpriv',
>> 'instruction/data', etc.
>
> If we want these features shouldnt we just bite the bullet and
> impelement AXI with its own set of QOM definitions? Axi slaves then
> inherit from TYPE_AXI_SLAVE. If we want ARM specific features then we
> should replace SYSBUS with an ARM bus that does these things rather
> than push them up to the memory API.

The memory API should provide the basic feature set that you can
use to implement system specific buses and transaction signals with.
We don't want to have reimplement basic support for reading and
writing all over again.

Also, we don't necesasrily want to implement AXI specifically;
we need to implement the programmer-visible parts of it, but many
of those carry over to AXI, APB, AHB...

> Add to that ARM bus feature list exclusive/non-exclusive as well.

Ah yes. We don't really model ARM exclusive transactions at all well
anywhere in QEMU ; I think it all works more by luck than anything
else at the moment...

-- PMM