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Re: [Qemu-devel] [RFC] Memory API and fine grained Memory Regions
From: |
Gerd Hoffmann |
Subject: |
Re: [Qemu-devel] [RFC] Memory API and fine grained Memory Regions |
Date: |
Fri, 26 Oct 2012 09:31:36 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:10.0.8) Gecko/20121012 Thunderbird/10.0.8 |
Hi,
> For actually writing into the device registers, its just uses an array
> index, no need to switch (ret = s->regs[addr]). However for my side
> effects I will need to populate that switch. If we convert to fine
> grained memory regions then the switch goes away and my side effect
> become pretty, but my register update becomes ugly as each individual
> handler needs to index into s->regs with a constant index for the
> actual read.
In hw/intel-hda.c I went for a simliar approach (predating memory api
though). There is a struct describing each register. Which bits are
writable, which bits are write-1-to-clear, what is the state after
reset, what is the offset in IntelHDAState. Alot of the access logic
can be in generic code then.
There are also (optional) per-register read/write handlers. read
handlers rarely needed, only for registers generating content on access
such as timers. write handlers are needed for most registers, but
certainly not all of them. read-only registers obviously can go
without, likewise registers which hold the dma address of some data
structures.
Feel free to steal ideas there.
cheers,
Gerd