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[Qemu-devel] [PATCH v2 19/19] target-mips: don't flush extra TLB on perm
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PATCH v2 19/19] target-mips: don't flush extra TLB on permissions upgrade |
Date: |
Tue, 30 Oct 2012 01:12:12 +0100 |
If the guest uses a TLBWI instruction for upgrading permissions, we
don't need to flush the extra TLBs. This improve boot time performance
by about 10%.
Signed-off-by: Aurelien Jarno <address@hidden>
---
target-mips/op_helper.c | 28 +++++++++++++++++++++++-----
1 file changed, 23 insertions(+), 5 deletions(-)
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index cdd6880..f45d494 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -1819,14 +1819,32 @@ static void r4k_fill_tlb(CPUMIPSState *env, int idx)
void r4k_helper_tlbwi(CPUMIPSState *env)
{
+ r4k_tlb_t *tlb;
int idx;
+ target_ulong VPN;
+ uint8_t ASID;
+ bool G, V0, D0, V1, D1;
idx = (env->CP0_Index & ~0x80000000) % env->tlb->nb_tlb;
-
- /* Discard cached TLB entries. We could avoid doing this if the
- tlbwi is just upgrading access permissions on the current entry;
- that might be a further win. */
- r4k_mips_tlb_flush_extra (env, env->tlb->nb_tlb);
+ tlb = &env->tlb->mmu.r4k.tlb[idx];
+ VPN = env->CP0_EntryHi & (TARGET_PAGE_MASK << 1);
+#if defined(TARGET_MIPS64)
+ VPN &= env->SEGMask;
+#endif
+ ASID = env->CP0_EntryHi & 0xff;
+ G = env->CP0_EntryLo0 & env->CP0_EntryLo1 & 1;
+ V0 = (env->CP0_EntryLo0 & 2) != 0;
+ D0 = (env->CP0_EntryLo0 & 4) != 0;
+ V1 = (env->CP0_EntryLo1 & 2) != 0;
+ D1 = (env->CP0_EntryLo1 & 4) != 0;
+
+ /* Discard cached TLB entries, unless tlbwi is just upgrading access
+ permissions on the current entry. */
+ if (tlb->VPN != VPN || tlb->ASID != ASID || tlb->G != G ||
+ (tlb->V0 && !V0) || (tlb->D0 && !D0) ||
+ (tlb->V1 && !V1) || (tlb->D1 && !D1)) {
+ r4k_mips_tlb_flush_extra(env, env->tlb->nb_tlb);
+ }
r4k_invalidate_tlb(env, idx, 0);
r4k_fill_tlb(env, idx);
--
1.7.10.4
- [Qemu-devel] [PATCH v2 00/19] target-mips: misc fixes and optimizations, Aurelien Jarno, 2012/10/29
- [Qemu-devel] [PATCH v2 01/19] target-mips: correctly restore btarget upon exception, Aurelien Jarno, 2012/10/29
- [Qemu-devel] [PATCH v2 11/19] target-mips: optimize load operations, Aurelien Jarno, 2012/10/29
- [Qemu-devel] [PATCH v2 02/19] target-mips: do not save CPU state when using retranslation, Aurelien Jarno, 2012/10/29
- [Qemu-devel] [PATCH v2 19/19] target-mips: don't flush extra TLB on permissions upgrade,
Aurelien Jarno <=
- [Qemu-devel] [PATCH v2 07/19] target-mips: cleanup float to int conversion helpers, Aurelien Jarno, 2012/10/29
- [Qemu-devel] [PATCH v2 03/19] softfloat: implement fused multiply-add NaN propagation for MIPS, Aurelien Jarno, 2012/10/29
- [Qemu-devel] [PATCH v2 14/19] target-mips: don't use local temps for store conditional, Aurelien Jarno, 2012/10/29
- [Qemu-devel] [PATCH v2 13/19] target-mips: implement unaligned loads using TCG, Aurelien Jarno, 2012/10/29
- [Qemu-devel] [PATCH v2 15/19] target-mips: implement movn/movz using movcond, Aurelien Jarno, 2012/10/29
- [Qemu-devel] [PATCH v2 06/19] target-mips: fix FPU exceptions, Aurelien Jarno, 2012/10/29
- [Qemu-devel] [PATCH v2 18/19] target-mips: fix TLBR wrt SEGMask, Aurelien Jarno, 2012/10/29
- [Qemu-devel] [PATCH v2 16/19] target-mips: optimize ddiv/ddivu/div/divu with movcond, Aurelien Jarno, 2012/10/29