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Re: [Qemu-devel] [PATCH] target-or32: Improve float exception
From: |
Wei-Ren Chen |
Subject: |
Re: [Qemu-devel] [PATCH] target-or32: Improve float exception |
Date: |
Fri, 23 Nov 2012 02:42:13 +0800 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
> -void QEMU_NORETURN raise_exception(OpenRISCCPU *cpu, uint32_t excp)
> +void QEMU_NORETURN raise_exception(OpenRISCCPU *cpu, uint32_t exception)
> {
> - cpu->env.exception_index = excp;
> + do_raise_exception_err(cpu, exception, 0);
> +}
> +
> +void QEMU_NORETURN do_raise_exception_err(OpenRISCCPU *cpu,
> + uint32_t exception,
> + uintptr_t pc)
> +{
> + TranslationBlock *tb;
> +#if 1
> + if (exception < 0x100)
> + qemu_log("%s: %d\n", __func__, exception);
> +#endif
> + cpu->env.exception_index = exception;
> +
> + if (pc) {
> + /* now we have a real cpu fault */
> + tb = tb_find_pc(pc);
> + if (tb) {
> + /* the PC is inside the translated code. It means that we have
> + a virtual CPU fault */
> + cpu_restore_state(tb, &cpu->env, pc);
> + }
> + }
> +
> cpu_loop_exit(&cpu->env);
> }
> +
> +void QEMU_NORETURN do_raise_exception(OpenRISCCPU *cpu,
> + uint32_t exception,
> + uintptr_t pc)
> +{
> + do_raise_exception_err(cpu, exception, pc);
> +}
I don't see any difference between do_raise_exception_err and
do_raise_exception here. MIPS do have those functions, but function
do_raise_exception_err has one more parameter for error code.
Please see target-mips/op_helper.c. If you don't need error code,
there just one function would be sufficient, I think.
> diff --git a/target-openrisc/exception.h b/target-openrisc/exception.h
> index 4b64430..1f0cd90 100644
> --- a/target-openrisc/exception.h
> +++ b/target-openrisc/exception.h
> @@ -23,6 +23,12 @@
> #include "cpu.h"
> #include "qemu-common.h"
>
> -void QEMU_NORETURN raise_exception(OpenRISCCPU *cpu, uint32_t excp);
> +void QEMU_NORETURN raise_exception(OpenRISCCPU *cpu, uint32_t exception);
>
> +void QEMU_NORETURN do_raise_exception_err(OpenRISCCPU *cpu,
> + uint32_t exception,
> + uintptr_t pc);
> +void QEMU_NORETURN do_raise_exception(OpenRISCCPU *cpu,
> + uint32_t exception,
> + uintptr_t pc);
Ditto.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj