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Re: [Qemu-devel] [PATCH] target-mips: Fix incorrect shift for SHILO and
From: |
Blue Swirl |
Subject: |
Re: [Qemu-devel] [PATCH] target-mips: Fix incorrect shift for SHILO and SHILOV |
Date: |
Tue, 4 Dec 2012 19:54:08 +0000 |
On Tue, Dec 4, 2012 at 7:48 PM, Jovanovic, Petar <address@hidden> wrote:
>> diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c
>> index e7949c2..f8a7a9f 100644
>> --- a/target-mips/dsp_helper.c
>> +++ b/target-mips/dsp_helper.c
>> @@ -3814,17 +3814,17 @@ void helper_shilo(target_ulong ac, target_ulong rs,
>> CPUMIPSState *env)
>>
>> rs5_0 = rs & 0x3F;
>> rs5_0 = (int8_t)(rs5_0 << 2) >> 2;
>> - rs5_0 = MIPSDSP_ABS(rs5_0);
>> +
>> + if (rs5_0 == 0)
>> + return;
>
>> The check should be moved to translation time so that the call to this
>> helper is not generated at all.
>
> This case is not likely so generation of unnecessary call is unlikely too.
> Let me know what you think.
Sorry, I was confused.
> I will add the missing braces and I can also get rid of
> MIPSDSP_ABS(rs5_0).
OK.
>
> Petar