Re: [Qemu-devel] [Qemu-ppc] [PATCH 02/19] mpic: Unify numbering scheme

[Scott Wood]

On 12/10/2012 05:34:19 PM, Scott Wood wrote:
> On 12/08/2012 07:44:25 AM, Alexander Graf wrote:
> >  /* Interrupt definitions */
> > -#define MPIC_EXT_IRQ      0
> > -#define MPIC_INT_IRQ      (MPIC_EXT_IRQ + MPIC_MAX_EXT)
> > -#define MPIC_TMR_IRQ      (MPIC_INT_IRQ + MPIC_MAX_INT)
> > -#define MPIC_MSG_IRQ      (MPIC_TMR_IRQ + MPIC_MAX_TMR)
> > -#define MPIC_MSI_IRQ      (MPIC_MSG_IRQ + MPIC_MAX_MSG)
> > -#define MPIC_IPI_IRQ      (MPIC_MSI_IRQ + MPIC_MAX_MSI)
> > +/* IRQs, accessible through the IRQ region */
> > +#define MPIC_EXT_IRQ      0x00
> > +#define MPIC_INT_IRQ      0x10
> > +#define MPIC_MSG_IRQ      0xb0
> > +#define MPIC_MSI_IRQ      0xe0
>
> Where are MPIC_EXT/INT/MSG/MSI_IRQ used now?  Note that these are
> specific to Freescale's MPIC.
>
> > +/* These are available through separate regions, but
> > +   for simplicity's sake mapped into the same number space */
> > +#define MPIC_TMR_IRQ      0xf3
> > +#define MPIC_IPI_IRQ      0xfb
>
> Please don't do this, or at least choose different numbers.  0xf3 is a
> valid MSI on p4080 (not to mention T4240 which goes beyond 256).
>
> Again, what uses these defines?  Is it something later in the series?

OK, the TMR/IPI are used by existing code that this patch doesn't  
remove, but I think that's not the case with EXT/INT/MSG/MSI.

-Scott