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[Qemu-devel] [RFC PATCH v4 16/30] pc: Add dimm paravirt SRAT info
From: |
Vasilis Liaskovitis |
Subject: |
[Qemu-devel] [RFC PATCH v4 16/30] pc: Add dimm paravirt SRAT info |
Date: |
Tue, 18 Dec 2012 13:41:44 +0100 |
The numa_fw_cfg paravirt interface is extended to include SRAT information for
all hotplug-able dimms. There are 3 words for each hotplug-able memory slot,
denoting start address, size and node proximity. The new info is appended after
existing numa info, so that the fw_cfg layout does not break. This information
is used by Seabios to build hotplug memory device objects at runtime.
nb_numa_nodes is set to 1 by default (not 0), so that we always pass srat info
to SeaBIOS.
v3->v4: numa_fw_cfg needs to be initalized after memory controller sets up dimm
ranges. Make changes for pc_piix and pc_q35 to set numa_fw_cfg after i440fx
initialization.
v2->v3: setting nb_numa_nodes to 1 is not needed
v1->v2:
Dimm SRAT info (#dimms) is appended at end of existing numa fw_cfg in order not
to break existing layout
Documentation of the new fwcfg layout is included in docs/specs/fwcfg.txt
Signed-off-by: Vasilis Liaskovitis <address@hidden>
---
docs/specs/fwcfg.txt | 28 ++++++++++++++++++++++++++++
hw/pc.c | 28 +++++++++++++++++++++++-----
hw/pc.h | 1 +
hw/pc_piix.c | 1 +
hw/pc_q35.c | 8 +++++---
sysemu.h | 1 +
6 files changed, 59 insertions(+), 8 deletions(-)
create mode 100644 docs/specs/fwcfg.txt
diff --git a/docs/specs/fwcfg.txt b/docs/specs/fwcfg.txt
new file mode 100644
index 0000000..e6fcd8f
--- /dev/null
+++ b/docs/specs/fwcfg.txt
@@ -0,0 +1,28 @@
+QEMU<->BIOS Paravirt Documentation
+--------------------------------------
+
+This document describes paravirt data structures passed from QEMU to BIOS.
+
+fw_cfg SRAT paravirt info
+--------------------
+The SRAT info passed from QEMU to BIOS has the following layout:
+
+-----------------------------------------------------------------------------------------------
+#nodes | cpu0_pxm | cpu1_pxm | ... | cpulast_pxm | node0_mem | node1_mem | ...
| nodelast_mem
+
+-----------------------------------------------------------------------------------------------
+#dimms | dimm0_start | dimm0_sz | dimm0_pxm | ... | dimmlast_start |
dimmlast_sz | dimmlast_pxm
+
+Entry 0 contains the number of numa nodes (nb_numa_nodes).
+
+Entries 1..max_cpus: The next max_cpus entries describe node proximity for each
+one of the vCPUs in the system.
+
+Entries max_cpus+1..max_cpus+nb_numa_nodes+1: The next nb_numa_nodes entries
+describe the memory size for each one of the NUMA nodes in the system.
+
+Entry max_cpus+nb_numa_nodes+1 contains the number of memory dimms
(nb_hp_dimms)
+
+The last 3 * nb_hp_dimms entries are organized in triplets: Each triplet
contains
+the physical address offset, size (in bytes), and node proximity for the
+respective dimm.
diff --git a/hw/pc.c b/hw/pc.c
index b11e7c4..025c356 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -51,6 +51,7 @@
#include "exec-memory.h"
#include "arch_init.h"
#include "bitmap.h"
+#include "hw/dimm.h"
/* debug PC/ISA interrupts */
//#define DEBUG_IRQ
@@ -582,8 +583,6 @@ static void *bochs_bios_init(void)
void *fw_cfg;
uint8_t *smbios_table;
size_t smbios_len;
- uint64_t *numa_fw_cfg;
- int i, j;
PortioList *bochs_bios_port_list = g_new(PortioList, 1);
portio_list_init(bochs_bios_port_list, bochs_bios_portio_list,
@@ -607,11 +606,24 @@ static void *bochs_bios_init(void)
fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, (uint8_t *)&hpet_cfg,
sizeof(struct hpet_fw_config));
+
+ return fw_cfg;
+}
+
+void bochs_meminfo_bios_init(void *fw_cfg)
+{
+ uint64_t *numa_fw_cfg;
+ uint64_t *hp_dimms_fw_cfg;
+ int i, j;
+
/* allocate memory for the NUMA channel: one (64bit) word for the number
* of nodes, one word for each VCPU->node and one word for each node to
* hold the amount of memory.
+ * Finally one word for the number of hotplug memory slots and three words
+ * for each hotplug memory slot (start address, size and node proximity).
*/
- numa_fw_cfg = g_malloc0((1 + max_cpus + nb_numa_nodes) * 8);
+ numa_fw_cfg = g_malloc0((2 + max_cpus + nb_numa_nodes + 3 * nb_hp_dimms)
+ * 8);
numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
for (i = 0; i < max_cpus; i++) {
for (j = 0; j < nb_numa_nodes; j++) {
@@ -624,10 +636,16 @@ static void *bochs_bios_init(void)
for (i = 0; i < nb_numa_nodes; i++) {
numa_fw_cfg[max_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
}
+
+ numa_fw_cfg[1 + max_cpus + nb_numa_nodes] = cpu_to_le64(nb_hp_dimms);
+
+ hp_dimms_fw_cfg = numa_fw_cfg + 2 + max_cpus + nb_numa_nodes;
+ if (nb_hp_dimms) {
+ dimm_setup_fwcfg_layout(hp_dimms_fw_cfg);
+ }
fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
- (1 + max_cpus + nb_numa_nodes) * 8);
+ (2 + max_cpus + nb_numa_nodes + 3 * nb_hp_dimms) * 8);
- return fw_cfg;
}
static long get_file_size(FILE *f)
diff --git a/hw/pc.h b/hw/pc.h
index 2237e86..075514f 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -185,5 +185,6 @@ void pc_system_firmware_init(MemoryRegion *rom_memory);
#define E820_UNUSABLE 5
int e820_add_entry(uint64_t, uint64_t, uint32_t);
+void bochs_meminfo_bios_init(void *fw_cfg);
#endif
diff --git a/hw/pc_piix.c b/hw/pc_piix.c
index fe995b9..1a99852 100644
--- a/hw/pc_piix.c
+++ b/hw/pc_piix.c
@@ -140,6 +140,7 @@ static void pc_init1(MemoryRegion *system_memory,
i440fx_host->mch.above_4g_mem_size = above_4g_mem_size;
qdev_init_nofail(DEVICE(i440fx_host));
+ bochs_meminfo_bios_init(fw_cfg);
i440fx_state = &i440fx_host->mch;
pci_bus = i440fx_host->parent_obj.bus;
/* Xen supports additional interrupt routes from the PCI devices to
diff --git a/hw/pc_q35.c b/hw/pc_q35.c
index e6375bf..7ce0b53 100644
--- a/hw/pc_q35.c
+++ b/hw/pc_q35.c
@@ -86,6 +86,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
ICH9LPCState *ich9_lpc;
PCIDevice *ahci;
qemu_irq *cmos_s3;
+ void *fw_cfg = NULL;
pc_cpus_init(cpu_model);
@@ -111,9 +112,9 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
/* allocate ram and load rom/bios */
if (!xen_enabled()) {
- pc_memory_init(get_system_memory(), kernel_filename, kernel_cmdline,
- initrd_filename, below_4g_mem_size, above_4g_mem_size,
- rom_memory, &ram_memory);
+ fw_cfg = pc_memory_init(get_system_memory(), kernel_filename,
+ kernel_cmdline, initrd_filename, below_4g_mem_size,
+ above_4g_mem_size, rom_memory, &ram_memory);
}
/* irq lines */
@@ -137,6 +138,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
q35_host->mch.above_4g_mem_size = above_4g_mem_size;
/* pci */
qdev_init_nofail(DEVICE(q35_host));
+ bochs_meminfo_bios_init(fw_cfg);
host_bus = q35_host->host.pci.bus;
/* create ISA bus */
lpc = pci_create_simple_multifunction(host_bus, PCI_DEVFN(ICH9_LPC_DEV,
diff --git a/sysemu.h b/sysemu.h
index 1b6add2..86f729e 100644
--- a/sysemu.h
+++ b/sysemu.h
@@ -130,6 +130,7 @@ extern QEMUClock *rtc_clock;
extern int nb_numa_nodes;
extern uint64_t node_mem[MAX_NODES];
extern unsigned long *node_cpumask[MAX_NODES];
+extern int nb_hp_dimms;
#define MAX_OPTION_ROMS 16
typedef struct QEMUOptionRom {
--
1.7.9
- [Qemu-devel] [RFC PATCH v4 05/30] [SeaBIOS] q35: Add memory hotplug handler, (continued)
- [Qemu-devel] [RFC PATCH v4 05/30] [SeaBIOS] q35: Add memory hotplug handler, Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 06/30] qapi: make visit_type_size fallback to type_int, Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 07/30] Add SIZE type to qdev properties, Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 08/30] qemu-option: export parse_option_number, Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 10/30] vl: handle "-device dimm", Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 09/30] Implement dimm device abstraction, Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 12/30] acpi_ich9 : Implement memory device hotplug registers, Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 17/30] [SeaBIOS] pci: Use paravirt interface for pcimem_start and pcimem64_start, Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 13/30] piix_pci and pc_piix: refactor, Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 15/30] q35: Add i440fx dram controller initialization, Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 16/30] pc: Add dimm paravirt SRAT info,
Vasilis Liaskovitis <=
- [Qemu-devel] [RFC PATCH v4 11/30] acpi_piix4 : Implement memory device hotplug registers, Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 14/30] piix_pci: Add i440fx dram controller initialization, Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 18/30] Introduce paravirt interface QEMU_CFG_PCI_WINDOW, Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 20/30] balloon: update with hotplugged memory, Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 26/30] Implement qmp and hmp commands for notification lists, Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 29/30] [SeaBIOS] Implement _PS3 method for memory device, Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 30/30] Implement _PS3 for dimm, Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 28/30] Add _OST dimm support, Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 27/30] [SeaBIOS] Add _OST dimm method, Vasilis Liaskovitis, 2012/12/18
- [Qemu-devel] [RFC PATCH v4 21/30] Implement dimm-info, Vasilis Liaskovitis, 2012/12/18