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Re: [Qemu-devel] [PATCH for-1.4] tcg/target-arm: Add missing parens to a


From: Blue Swirl
Subject: Re: [Qemu-devel] [PATCH for-1.4] tcg/target-arm: Add missing parens to assertions
Date: Sat, 19 Jan 2013 14:00:29 +0000

Thanks, applied.

On Thu, Jan 17, 2013 at 8:04 PM, Peter Maydell <address@hidden> wrote:
> Silence a (legitimate) complaint about missing parentheses:
>
> tcg/arm/tcg-target.c: In function ‘tcg_out_qemu_ld’:
> tcg/arm/tcg-target.c:1148:5: error: suggest parentheses around
> comparison in operand of ‘&’ [-Werror=parentheses]
> tcg/arm/tcg-target.c: In function ‘tcg_out_qemu_st’:
> tcg/arm/tcg-target.c:1357:5: error: suggest parentheses around
> comparison in operand of ‘&’ [-Werror=parentheses]
>
> which meant that we would mistakenly always assert if running
> a QEMU built with debug enabled on ARM.
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> Errors inadvertently introduced in commit d17bd1.
>
>  tcg/arm/tcg-target.c |    4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
> index c3ac85e..d9c33d8 100644
> --- a/tcg/arm/tcg-target.c
> +++ b/tcg/arm/tcg-target.c
> @@ -1145,7 +1145,7 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const 
> TCGArg *args, int opc)
>                      TCG_REG_R0, SHIFT_IMM_LSL(CPU_TLB_ENTRY_BITS));
>      /* We assume that the offset is contained within 20 bits.  */
>      tlb_offset = offsetof(CPUArchState, tlb_table[mem_index][0].addr_read);
> -    assert(tlb_offset & ~0xfffff == 0);
> +    assert((tlb_offset & ~0xfffff) == 0);
>      if (tlb_offset > 0xfff) {
>          tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R0, TCG_REG_R0,
>                          0xa00 | (tlb_offset >> 12));
> @@ -1354,7 +1354,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const 
> TCGArg *args, int opc)
>                      TCG_AREG0, TCG_REG_R0, 
> SHIFT_IMM_LSL(CPU_TLB_ENTRY_BITS));
>      /* We assume that the offset is contained within 20 bits.  */
>      tlb_offset = offsetof(CPUArchState, tlb_table[mem_index][0].addr_write);
> -    assert(tlb_offset & ~0xfffff == 0);
> +    assert((tlb_offset & ~0xfffff) == 0);
>      if (tlb_offset > 0xfff) {
>          tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R0, TCG_REG_R0,
>                          0xa00 | (tlb_offset >> 12));
> --
> 1.7.9.5
>
>



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