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Re: [Qemu-devel] [PATCH 4/7 v2] KVM regsync: Add register bitmap paramet


From: Alexander Graf
Subject: Re: [Qemu-devel] [PATCH 4/7 v2] KVM regsync: Add register bitmap parameter to do_kvm_cpu_synchronize_state
Date: Thu, 24 Jan 2013 19:26:17 +0100

On 24.01.2013, at 19:17, Scott Wood wrote:

> On 01/24/2013 06:41:05 AM, Alexander Graf wrote:
>> On 16.01.2013, at 18:23, Marcelo Tosatti wrote:
>> > What register is that and why it cannot be synced normally? When is it
>> > necessary to sync it?
>> We need to sync it on the above 2 occasions.
>> Thinking about this a bit more, we're trying to keep the synchronization 
>> window short to not get into conflicts with the kernel timer kicking in in 
>> between. Imagine this race:
>>  * user space reads TSR
>>  * kernel timer expires, sets bit in TSR
>>  * user space writes TSR
>> That's why we don't want this to be synced every time. We would only set TSR 
>> when we reset the counter. At that point in time it doesn't hurt to lose the 
>> kernel timer set, because we cleared the bit anyways.
>> But maybe the better solution would be a special "write to clear" ONE_REG 
>> register to clear specific bits and a big hammer "set" ONE_REG (which we 
>> have already) for reset only.
>> That would make things easier, right? Scott, any ideas on this?
> 
> Yes, we should have a ONE_REG write-to-clear TSR.  Maybe a write-to-set 
> version as well, in case userspace wants to inject something.  Likewise for 
> MCSR.

Bharat, could you please quickly write up a patch to do this?


Thanks!

Alex




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