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[Qemu-devel] [PATCH 08/10] target-mips: Fix check_cp1_64bitmode


From: Richard Henderson
Subject: [Qemu-devel] [PATCH 08/10] target-mips: Fix check_cp1_64bitmode
Date: Sun, 10 Feb 2013 10:30:48 -0800

COP1X refers to the availability of indexed memory operations,
not whether the FPU has 64-bit registers.

Signed-off-by: Richard Henderson <address@hidden>
---
 target-mips/translate.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/target-mips/translate.c b/target-mips/translate.c
index b3b8dc6..a39e118 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1366,8 +1366,9 @@ static inline void check_cop1x(DisasContext *ctx)
 
 static inline void check_cp1_64bitmode(DisasContext *ctx)
 {
-    if (unlikely(~ctx->hflags & (MIPS_HFLAG_F64 | MIPS_HFLAG_COP1X)))
+    if (unlikely(!(ctx->hflags & MIPS_HFLAG_F64))) {
         generate_exception(ctx, EXCP_RI);
+    }
 }
 
 /*
-- 
1.8.1.2




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