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[Qemu-devel] [PATCH 05/47] target-openrisc: Update OpenRISCCPU to QOM re
From: |
Andreas Färber |
Subject: |
[Qemu-devel] [PATCH 05/47] target-openrisc: Update OpenRISCCPU to QOM realizefn |
Date: |
Sat, 16 Feb 2013 16:45:00 +0100 |
Update the openrisc_cpu_realize() signature, hook it up to
DeviceClass::realize and set realized = true in cpu_openrisc_init().
qapi/error.h is now included through qdev and no longer needed.
Signed-off-by: Andreas Färber <address@hidden>
Cc: Jia Liu <address@hidden>
---
target-openrisc/cpu.c | 13 ++++++++++---
target-openrisc/cpu.h | 4 ++--
2 Dateien geändert, 12 Zeilen hinzugefügt(+), 5 Zeilen entfernt(-)
diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c
index a7a8de8..d8cc533 100644
--- a/target-openrisc/cpu.c
+++ b/target-openrisc/cpu.c
@@ -62,12 +62,15 @@ static inline void set_feature(OpenRISCCPU *cpu, int
feature)
cpu->env.cpucfgr = cpu->feature;
}
-void openrisc_cpu_realize(Object *obj, Error **errp)
+static void openrisc_cpu_realizefn(DeviceState *dev, Error **errp)
{
- OpenRISCCPU *cpu = OPENRISC_CPU(obj);
+ OpenRISCCPU *cpu = OPENRISC_CPU(dev);
+ OpenRISCCPUClass *occ = OPENRISC_CPU_GET_CLASS(dev);
qemu_init_vcpu(&cpu->env);
cpu_reset(CPU(cpu));
+
+ occ->parent_realize(dev, errp);
}
static void openrisc_cpu_initfn(Object *obj)
@@ -134,6 +137,10 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void
*data)
{
OpenRISCCPUClass *occ = OPENRISC_CPU_CLASS(oc);
CPUClass *cc = CPU_CLASS(occ);
+ DeviceClass *dc = DEVICE_CLASS(oc);
+
+ occ->parent_realize = dc->realize;
+ dc->realize = openrisc_cpu_realizefn;
occ->parent_reset = cc->reset;
cc->reset = openrisc_cpu_reset;
@@ -187,7 +194,7 @@ OpenRISCCPU *cpu_openrisc_init(const char *cpu_model)
cpu = OPENRISC_CPU(object_new(object_class_get_name(oc)));
cpu->env.cpu_model_str = cpu_model;
- openrisc_cpu_realize(OBJECT(cpu), NULL);
+ object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
return cpu;
}
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
index 3beab45..419f007 100644
--- a/target-openrisc/cpu.h
+++ b/target-openrisc/cpu.h
@@ -33,7 +33,6 @@ struct OpenRISCCPU;
#include "exec/cpu-defs.h"
#include "fpu/softfloat.h"
#include "qom/cpu.h"
-#include "qapi/error.h"
#define TYPE_OPENRISC_CPU "or32-cpu"
@@ -46,6 +45,7 @@ struct OpenRISCCPU;
/**
* OpenRISCCPUClass:
+ * @parent_realize: The parent class' realize handler.
* @parent_reset: The parent class' reset handler.
*
* A OpenRISC CPU model.
@@ -55,6 +55,7 @@ typedef struct OpenRISCCPUClass {
CPUClass parent_class;
/*< public >*/
+ DeviceRealize parent_realize;
void (*parent_reset)(CPUState *cpu);
} OpenRISCCPUClass;
@@ -340,7 +341,6 @@ static inline OpenRISCCPU
*openrisc_env_get_cpu(CPUOpenRISCState *env)
#define ENV_GET_CPU(e) CPU(openrisc_env_get_cpu(e))
OpenRISCCPU *cpu_openrisc_init(const char *cpu_model);
-void openrisc_cpu_realize(Object *obj, Error **errp);
void cpu_openrisc_list(FILE *f, fprintf_function cpu_fprintf);
int cpu_openrisc_exec(CPUOpenRISCState *s);
--
1.7.10.4
- [Qemu-devel] [PULL 00/47] QOM CPUState patch queue 2013-02-16, Andreas Färber, 2013/02/16
- [Qemu-devel] [PATCH 02/47] target-alpha: Update AlphaCPU to QOM realizefn, Andreas Färber, 2013/02/16
- [Qemu-devel] [PATCH 01/47] cpu: Prepare QOM realizefn, Andreas Färber, 2013/02/16
- [Qemu-devel] [PATCH 03/47] target-arm: Update ARMCPU to QOM realizefn, Andreas Färber, 2013/02/16
- [Qemu-devel] [PATCH 04/47] target-i386: Update X86CPU to QOM realizefn, Andreas Färber, 2013/02/16
- [Qemu-devel] [PATCH 05/47] target-openrisc: Update OpenRISCCPU to QOM realizefn,
Andreas Färber <=
- [Qemu-devel] [PATCH 10/47] target-microblaze: Introduce QOM realizefn for MicroBlazeCPU, Andreas Färber, 2013/02/16
- [Qemu-devel] [PATCH 08/47] target-lm32: Introduce QOM realizefn for LM32CPU, Andreas Färber, 2013/02/16
- [Qemu-devel] [PATCH 06/47] target-ppc: Update PowerPCCPU to QOM realizefn, Andreas Färber, 2013/02/16
- [Qemu-devel] [PATCH 07/47] target-cris: Introduce QOM realizefn for CRISCPU, Andreas Färber, 2013/02/16
- [Qemu-devel] [PATCH 09/47] target-m68k: Introduce QOM realizefn for M68kCPU, Andreas Färber, 2013/02/16
- [Qemu-devel] [PATCH 12/47] target-s390x: Introduce QOM realizefn for S390CPU, Andreas Färber, 2013/02/16
- [Qemu-devel] [PATCH 15/47] target-unicore32: Introduce QOM realizefn for UniCore32CPU, Andreas Färber, 2013/02/16
- [Qemu-devel] [PATCH 11/47] target-mips: Introduce QOM realizefn for MIPSCPU, Andreas Färber, 2013/02/16
- [Qemu-devel] [PATCH 13/47] target-sh4: Introduce QOM realizefn for SuperHCPU, Andreas Färber, 2013/02/16
- [Qemu-devel] [PATCH 19/47] target-lm32: Move TCG initialization to LM32CPU initfn, Andreas Färber, 2013/02/16