[Qemu-devel] [PATCH 26/57] target-i386: optimize setle

[Richard Henderson]

And allow gen_setcc_slow to operate on cpu_cc_src.

Signed-off-by: Paolo Bonzini <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
 target-i386/translate.c | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/target-i386/translate.c b/target-i386/translate.c
index dab6983..fea43c7 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -1045,7 +1045,6 @@ static void gen_compute_eflags_z(DisasContext *s, TCGv 
reg, bool inv)
 
 static void gen_setcc_slow(DisasContext *s, int jcc_op, TCGv reg, bool inv)
 {
-    assert(!TCGV_EQUAL(reg, cpu_cc_src));
     switch(jcc_op) {
     case JCC_O:
         gen_compute_eflags_o(s, reg);
@@ -1072,20 +1071,18 @@ static void gen_setcc_slow(DisasContext *s, int jcc_op, 
TCGv reg, bool inv)
         break;
     case JCC_L:
         gen_compute_eflags(s);
-        tcg_gen_shri_tl(reg, cpu_cc_src, 11); /* CC_O */
-        tcg_gen_shri_tl(cpu_tmp0, cpu_cc_src, 7); /* CC_S */
+        tcg_gen_shri_tl(cpu_tmp0, cpu_cc_src, 11); /* CC_O */
+        tcg_gen_shri_tl(reg, cpu_cc_src, 7); /* CC_S */
         tcg_gen_xor_tl(reg, reg, cpu_tmp0);
         tcg_gen_andi_tl(reg, reg, 1);
         break;
     default:
     case JCC_LE:
         gen_compute_eflags(s);
-        tcg_gen_shri_tl(reg, cpu_cc_src, 11); /* CC_O */
-        tcg_gen_shri_tl(cpu_tmp4, cpu_cc_src, 7); /* CC_S */
-        tcg_gen_shri_tl(cpu_tmp0, cpu_cc_src, 6); /* CC_Z */
-        tcg_gen_xor_tl(reg, reg, cpu_tmp4);
-        tcg_gen_or_tl(reg, reg, cpu_tmp0);
-        tcg_gen_andi_tl(reg, reg, 1);
+        tcg_gen_shri_tl(cpu_tmp0, cpu_cc_src, 4); /* CC_O -> CC_S */
+        tcg_gen_xor_tl(reg, cpu_tmp0, cpu_cc_src);
+        tcg_gen_andi_tl(reg, reg, CC_S | CC_Z);
+        tcg_gen_setcondi_tl(inv ? TCG_COND_EQ : TCG_COND_NE, reg, reg, 0);
         break;
     }
     if (inv) {
-- 
1.8.1.2