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[Qemu-devel] [PATCH 00/38] Add double-word addition and widening multipl
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 00/38] Add double-word addition and widening multiply tcg ops |
Date: |
Tue, 19 Feb 2013 23:51:48 -0800 |
... and use them where appropriate in the targets. As can be seen,
most targets can make use of a widening multiply. And if one is
sufficiently clever, one can use add2 to significantly improve carry
generation for the target.
This patch series is based on the target-i386 flags rewrite that I
just posted, but except for the two target-i386 patches, isn't really
dependant on it.
This patch series also cleans up target-ppc more ought to be present
here, but I didn't feel up to breaking it out as a prerequisite.
r~
Richard Henderson (38):
tcg: Make 32-bit multiword operations optional for 64-bit hosts
tcg-i386: Always implement 32-bit multiword ops
tcg-sparc: Always implement 32-bit multiword ops
tcg: Add 64-bit multiword arithmetic operations
tcg: Add signed multiword multiplication operations
tcg: Implement a 64-bit to 32-bit extraction helper
tcg: Implement multiword multiply helpers
tcg: Implement multiword addition helpers
tcg-i386: Implement multiword arithmetic ops
tcg-arm: Implement muls2_i32
target-i386: Use mulu2 and muls2
target-i386: Use add2 to implement the ADX extension
tcg: Implement muls2 with mulu2
tcg: Apply life analysis to 64-bit multiword arithmetic ops
target-alpha: Use mulu2 for umulh insn
target-s390x: Use mulu2 for mlgr insn
target-arm: Use mul[us]2 in gen_mul[us]_i64_i32
target-arm: Use mul[us]2 and add2 in umlal et al
target-arm: Use add2 in gen_add_CC
target-arm: Implement adc_cc inline
target-arm: Implement sbc_cc inline
target-mips: Use mul[us]2 in [D]MULT[U] insns
target-cris: Use mul*2 in mul* insns
target-ppc: Use mul*2 in mulh* insns
target-ppc: Split out SO, OV, CA fields from XER
target-ppc: Use setcond in gen_op_cmp
target-ppc: Compute addition overflow without branches
target-ppc: Compute addition carry with setcond
target-ppc: Use add2 for carry generation
target-ppc: Implement neg in terms of subf
target-ppc: Compute arithmetic shift carry without branches
target-ppc: Compute mullwo without branches
target-sparc: Use official add2/sub2 interfaces for addx/subx
target-sparc: Use mul*2 for multiply
target-sh4: Use mul*2 for dmul*
target-unicore32: Use mul*2 for do_mult
target-xtensa: Use mul*2 for mul*hi
target-xtensa: Use add2/sub2 for mac
target-alpha/helper.h | 1 -
target-alpha/int_helper.c | 7 -
target-alpha/translate.c | 20 +-
target-arm/helper.c | 5 -
target-arm/helper.h | 5 -
target-arm/op_helper.c | 30 --
target-arm/translate.c | 157 +++++++---
target-cris/translate.c | 44 +--
target-i386/helper.h | 4 -
target-i386/int_helper.c | 40 ---
target-i386/translate.c | 187 +++++-------
target-mips/helper.h | 2 -
target-mips/op_helper.c | 12 -
target-mips/translate.c | 48 ++-
target-ppc/cpu.h | 24 +-
target-ppc/helper.h | 2 -
target-ppc/int_helper.c | 56 +---
target-ppc/kvm.c | 4 +-
target-ppc/machine.c | 8 +-
target-ppc/translate.c | 676 ++++++++++++++++++-------------------------
target-ppc/translate_init.c | 4 +-
target-s390x/helper.h | 1 -
target-s390x/int_helper.c | 8 -
target-s390x/translate.c | 3 +-
target-sh4/translate.c | 30 +-
target-sparc/translate.c | 87 +++---
target-unicore32/translate.c | 83 +-----
target-xtensa/translate.c | 49 ++--
tcg-runtime.c | 16 +-
tcg/README | 30 +-
tcg/arm/tcg-target.c | 4 +
tcg/arm/tcg-target.h | 1 +
tcg/hppa/tcg-target.h | 1 +
tcg/i386/tcg-target.c | 49 ++--
tcg/i386/tcg-target.h | 8 +
tcg/ia64/tcg-target.h | 8 +
tcg/mips/tcg-target.h | 1 +
tcg/optimize.c | 5 +-
tcg/ppc/tcg-target.h | 1 +
tcg/ppc64/tcg-target.h | 8 +
tcg/s390/tcg-target.h | 8 +
tcg/sparc/tcg-target.c | 6 +-
tcg/sparc/tcg-target.h | 8 +
tcg/tcg-op.h | 228 +++++++++++++++
tcg/tcg-opc.h | 12 +-
tcg/tcg-runtime.h | 2 +
tcg/tcg.c | 28 +-
tcg/tcg.h | 10 +-
tcg/tci/tcg-target.h | 9 +
49 files changed, 1013 insertions(+), 1027 deletions(-)
--
1.8.1.2
- [Qemu-devel] [PATCH 00/38] Add double-word addition and widening multiply tcg ops,
Richard Henderson <=
- [Qemu-devel] [PATCH 02/38] tcg-i386: Always implement 32-bit multiword ops, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 04/38] tcg: Add 64-bit multiword arithmetic operations, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 01/38] tcg: Make 32-bit multiword operations optional for 64-bit hosts, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 03/38] tcg-sparc: Always implement 32-bit multiword ops, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 05/38] tcg: Add signed multiword multiplication operations, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 07/38] tcg: Implement multiword multiply helpers, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 06/38] tcg: Implement a 64-bit to 32-bit extraction helper, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 08/38] tcg: Implement multiword addition helpers, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 12/38] target-i386: Use add2 to implement the ADX extension, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 10/38] tcg-arm: Implement muls2_i32, Richard Henderson, 2013/02/20