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[Qemu-devel] [PATCH 09/38] tcg-i386: Implement multiword arithmetic ops
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 09/38] tcg-i386: Implement multiword arithmetic ops |
Date: |
Tue, 19 Feb 2013 23:51:57 -0800 |
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/i386/tcg-target.c | 33 +++++++++++++++++++++------------
tcg/i386/tcg-target.h | 10 +++++-----
2 files changed, 26 insertions(+), 17 deletions(-)
diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
index f645529..9eec06c 100644
--- a/tcg/i386/tcg-target.c
+++ b/tcg/i386/tcg-target.c
@@ -1922,31 +1922,34 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc,
tcg_out_qemu_st(s, args, 3);
break;
- case INDEX_op_mulu2_i32:
- tcg_out_modrm(s, OPC_GRP3_Ev, EXT3_MUL, args[3]);
+ OP_32_64(mulu2):
+ tcg_out_modrm(s, OPC_GRP3_Ev + rexw, EXT3_MUL, args[3]);
break;
- case INDEX_op_add2_i32:
+ OP_32_64(muls2):
+ tcg_out_modrm(s, OPC_GRP3_Ev + rexw, EXT3_IMUL, args[3]);
+ break;
+ OP_32_64(add2):
if (const_args[4]) {
- tgen_arithi(s, ARITH_ADD, args[0], args[4], 1);
+ tgen_arithi(s, ARITH_ADD + rexw, args[0], args[4], 1);
} else {
- tgen_arithr(s, ARITH_ADD, args[0], args[4]);
+ tgen_arithr(s, ARITH_ADD + rexw, args[0], args[4]);
}
if (const_args[5]) {
- tgen_arithi(s, ARITH_ADC, args[1], args[5], 1);
+ tgen_arithi(s, ARITH_ADC + rexw, args[1], args[5], 1);
} else {
- tgen_arithr(s, ARITH_ADC, args[1], args[5]);
+ tgen_arithr(s, ARITH_ADC + rexw, args[1], args[5]);
}
break;
- case INDEX_op_sub2_i32:
+ OP_32_64(sub2):
if (const_args[4]) {
- tgen_arithi(s, ARITH_SUB, args[0], args[4], 1);
+ tgen_arithi(s, ARITH_SUB + rexw, args[0], args[4], 1);
} else {
- tgen_arithr(s, ARITH_SUB, args[0], args[4]);
+ tgen_arithr(s, ARITH_SUB + rexw, args[0], args[4]);
}
if (const_args[5]) {
- tgen_arithi(s, ARITH_SBB, args[1], args[5], 1);
+ tgen_arithi(s, ARITH_SBB + rexw, args[1], args[5], 1);
} else {
- tgen_arithr(s, ARITH_SBB, args[1], args[5]);
+ tgen_arithr(s, ARITH_SBB + rexw, args[1], args[5]);
}
break;
@@ -2080,6 +2083,7 @@ static const TCGTargetOpDef x86_op_defs[] = {
#endif
{ INDEX_op_mulu2_i32, { "a", "d", "a", "r" } },
+ { INDEX_op_muls2_i32, { "a", "d", "a", "r" } },
{ INDEX_op_add2_i32, { "r", "r", "0", "1", "ri", "ri" } },
{ INDEX_op_sub2_i32, { "r", "r", "0", "1", "ri", "ri" } },
@@ -2134,6 +2138,11 @@ static const TCGTargetOpDef x86_op_defs[] = {
{ INDEX_op_deposit_i64, { "Q", "0", "Q" } },
{ INDEX_op_movcond_i64, { "r", "r", "re", "r", "0" } },
+
+ { INDEX_op_mulu2_i64, { "a", "d", "a", "r" } },
+ { INDEX_op_muls2_i64, { "a", "d", "a", "r" } },
+ { INDEX_op_add2_i64, { "r", "r", "0", "1", "re", "re" } },
+ { INDEX_op_sub2_i64, { "r", "r", "0", "1", "re", "re" } },
#endif
#if TCG_TARGET_REG_BITS == 64
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index 2b08ef7..e3f6bb9 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/tcg-target.h
@@ -95,7 +95,7 @@ typedef enum {
#define TCG_TARGET_HAS_add2_i32 1
#define TCG_TARGET_HAS_sub2_i32 1
#define TCG_TARGET_HAS_mulu2_i32 1
-#define TCG_TARGET_HAS_muls2_i32 0
+#define TCG_TARGET_HAS_muls2_i32 1
#if TCG_TARGET_REG_BITS == 64
#define TCG_TARGET_HAS_div2_i64 1
@@ -118,10 +118,10 @@ typedef enum {
#define TCG_TARGET_HAS_nor_i64 0
#define TCG_TARGET_HAS_deposit_i64 1
#define TCG_TARGET_HAS_movcond_i64 1
-#define TCG_TARGET_HAS_add2_i64 0
-#define TCG_TARGET_HAS_sub2_i64 0
-#define TCG_TARGET_HAS_mulu2_i64 0
-#define TCG_TARGET_HAS_muls2_i64 0
+#define TCG_TARGET_HAS_add2_i64 1
+#define TCG_TARGET_HAS_sub2_i64 1
+#define TCG_TARGET_HAS_mulu2_i64 1
+#define TCG_TARGET_HAS_muls2_i64 1
#endif
#define TCG_TARGET_deposit_i32_valid(ofs, len) \
--
1.8.1.2
- [Qemu-devel] [PATCH 02/38] tcg-i386: Always implement 32-bit multiword ops, (continued)
- [Qemu-devel] [PATCH 02/38] tcg-i386: Always implement 32-bit multiword ops, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 04/38] tcg: Add 64-bit multiword arithmetic operations, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 01/38] tcg: Make 32-bit multiword operations optional for 64-bit hosts, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 03/38] tcg-sparc: Always implement 32-bit multiword ops, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 05/38] tcg: Add signed multiword multiplication operations, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 07/38] tcg: Implement multiword multiply helpers, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 06/38] tcg: Implement a 64-bit to 32-bit extraction helper, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 08/38] tcg: Implement multiword addition helpers, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 12/38] target-i386: Use add2 to implement the ADX extension, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 10/38] tcg-arm: Implement muls2_i32, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 09/38] tcg-i386: Implement multiword arithmetic ops,
Richard Henderson <=
- [Qemu-devel] [PATCH 14/38] tcg: Apply life analysis to 64-bit multiword arithmetic ops, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 16/38] target-s390x: Use mulu2 for mlgr insn, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 11/38] target-i386: Use mulu2 and muls2, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 13/38] tcg: Implement muls2 with mulu2, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 18/38] target-arm: Use mul[us]2 and add2 in umlal et al, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 15/38] target-alpha: Use mulu2 for umulh insn, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 28/38] target-ppc: Compute addition carry with setcond, Richard Henderson, 2013/02/20
- [Qemu-devel] [PATCH 32/38] target-ppc: Compute mullwo without branches, Richard Henderson, 2013/02/20