Re: [Qemu-devel] [ARM] Cortex-R4F and VFP3-D16

[Peter Maydell]

On 1 March 2013 15:10, Fabien Chouteau <address@hidden> wrote:
> On 03/01/2013 02:43 PM, Fabien Chouteau wrote:
>> On 03/01/2013 01:16 PM, Peter Maydell wrote:
>>> OK, that makes sense. I think it's also a reasonable thing for
>>> qemu's qemu-system-armeb model to present to the guest. Have
>>> you changed QEMU to report IE and EE (and CPSR.E) as always-1,
>>> or does your guest code just not look at them?
>>>
>>
>> We don't look at them so I didn't change anything, but maybe it's not
>> difficult to do.

> These fields are ARMv6/7 only, right?

That's correct -- they're part of the BE8 big-endian model which
was introduced with ARMv6. (The old v5 BE32 model uses SCTLR.B,
ie bit 7 -- on a BE8-only core, which all v7 cores are, SCTLR.B is
always 0.) On older versions of the architecture the IE and EE bits
were reserved, and read as zero. (Technically we are supposed to
implement reserved bits as 'read zero, writes ignored' but QEMU
often ignores this and implements as reads-as-written. Well
behaved guests will not notice the difference.)

-- PMM