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Re: [Qemu-devel] [PATCH 00/12] KVM Support for MIPS32 Processors
From: |
Andreas Färber |
Subject: |
Re: [Qemu-devel] [PATCH 00/12] KVM Support for MIPS32 Processors |
Date: |
Mon, 04 Mar 2013 12:55:53 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130215 Thunderbird/17.0.3 |
Hello,
Am 02.03.2013 16:18, schrieb Sanjay Lal:
> The following patchset implements KVM support for MIPS32 processors,
> using Trap & Emulate, with basic runtime binary translation to improve
> performance.
[snip]
Please see http://wiki.qemu.org/Contribute/SubmitAPatch for some hints
on how to improve submission of your QEMU patchset. In particular we
require Signed-off-bys just like Linux, subjects should use
"target-mips: " or similar based on file/directory names, subject line
should be one short statement and commit message should give further
explanations of what the patch is doing and why, where appropriate.
Also a fair warning: I am refactoring the core CPU code, so you should
be tracking qemu.git and/or mailing list for possible conflicts and
rebasing necessary.
In that context please prefer use of MIPSCPU over CPUMIPSState (e.g., in
GIC state and functions).
Please adopt our Coding Style, which among other things asks for
CamelCase struct naming (e.g., MIPSGICState rather than gic_t).
Please learn about QOM usage and its conventions. Your GIC should
probably be a SysBusDevice, not a pre-qdev collection of manually
allocated state.
http://wiki.qemu.org/QOMConventions
There's also an ongoing discussion about DPRINTF()s defined as no-op "do
{} while(0)" leading to format string breakages over time. Recommended
replacement is a macro using "do { if (FOO) { ... } } while (0)", with
FOO evaluating to 0 in the no-debug case, so that everything gets
compile-tested but optimized out.
Regards,
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
- Re: [Qemu-devel] [PATCH 08/12] KVM/MIPS: Enable KVM/MIPS for MIPS targets. Add MIPS GIC code to the build., (continued)
- [Qemu-devel] [PATCH 01/12] KVM/MIPS: Bootcode for MIPS SMP configurations with a GCMP, Sanjay Lal, 2013/03/02
- [Qemu-devel] [PATCH 01/12] MIPS: Bootcode for MIPS SMP configurations with a GCMP, Sanjay Lal, 2013/03/02
- [Qemu-devel] [PATCH 05/12] KVM/MIPS: In KVM mode, inject IRQ2 (I/O) interupts via ioctls(). COP0 emulation is in-kernel, Sanjay Lal, 2013/03/02
- [Qemu-devel] [PATCH 04/12] KVM/MIPS: Do not start the periodic timer in KVM mode. Compare/Count timer interrupts are handled in-kernel., Sanjay Lal, 2013/03/02
- [Qemu-devel] [PATCH 06/12] KVM/MIPS: Define APIs to convert Guest KSEG0 <-> Guest Physical addresses., Sanjay Lal, 2013/03/02
- [Qemu-devel] [PATCH 10/12] KVM/MIPS: Set page size to 16K in KVM mode., Sanjay Lal, 2013/03/02
- Re: [Qemu-devel] [PATCH 00/12] KVM Support for MIPS32 Processors, Zhang, Yang Z, 2013/03/03
- Re: [Qemu-devel] [PATCH 00/12] KVM Support for MIPS32 Processors,
Andreas Färber <=